Page Index - retrotruestory/M1DEV GitHub Wiki
307 page(s) in this GitHub Wiki:
- Home
- ## 1. Fast Memory Copy Implementation
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- 24‐point summary of the Magic 1 computer architecture
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- a
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- About Bill Buzbee
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- Additional information requiring reorganization
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- Additional Undocumented Magic‐1 Features
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- Addressing Modes
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- adduser
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- Analysis and Implementation of Magic‐1 Bootloader Size Limitations
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- Architectural Verification Test Suite
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- assembler (m1_as)
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- Basic C interpreter environment
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- boot‐room
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- CF & IDE
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- Clocks
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- command: adb
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- Comprehensive Analysis of Magic‐1 Architecture and Bootloader
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- Configure linux environment to create new programs for Magic‐1
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- Control Lines
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- Create a virtual machine with a C interpreter
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- Create assembly routines for performance‐critical sections
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- Create port forwarding rule on your Ubee EVW32C router
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- Creating a new program for Magic‐1 in the linux environment
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- Creating new software for Magic‐1
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- Critical Technical Details for Magic‐1 Programmers
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- Cross Development Environment Overview
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- Date and Time
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- Debug capabilities
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- Debugging Magic‐1
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- Details for Magic‐1 Bootloader
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- Device virtualization
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- Dhrystone
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- Direct access to Magic‐1 hardware through VM interface
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- Direct hardware access control
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- Direct use of ldcode stcode for memory access
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- emu
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- emulator status
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- emulator work
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- EPROM daughter card
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- eprom programmer
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- Example of using inline assembly in C code for Magic‐1
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- example: postcode.c
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- example: segfault (in C) on Magic‐1
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- expanding the Magic‑1 microcode
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- Fetch Execute Sequence
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- fibonacci program
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- file: M1.md
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- Fixing Magic‐1 Emulator CPU Implementation Issues
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- for later
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- Front panel LEDs
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- fsck
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- glossary of terms
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- History of the birth of Magic‐1
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- How to change port numbers for ftp and telnet
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- How to change the host name of your machine
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- How to change the setting so that Magic‐1 automatically boots with the network and RAM disk enabled?
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- How to prepare a CF card with the system
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- Ideas for the future
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- Implementation of Test Bank and Diagnostic Microinstructions
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- Implementing an Instruction Cache for Magic‐1
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- Integration with VM system
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- Internal Busses
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- Interrupt Vector
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- intr
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- In‐Depth Magic‐1 Technical Analysis
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- it would be possible to double the microcode store from 512 to 1024 entries
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- Just‐in‐time compilation
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- List of files (map)
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- List of ICs parts list (BOM)
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- List of questions:
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- Load map for bloader
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- Loading program (bootloader)
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- Loading sequence
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- M1emu ‐ programmer
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- Magic Architecture Overview
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- Magic‐1 Architecture Summary
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- Magic‐1 Boot Process
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- Magic‐1 Bootloader Format
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- Magic‐1 bootloader loading and execution process
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- Magic‐1 Bootloader Optimization Analysis (Tested and works)
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- Magic‐1 CF Card Boot Process
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- Magic‐1 CF Card Communication Protocol
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- Magic‐1 CF Card Interface Protocol
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- Magic‐1 Complete Technical Specification
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- Magic‐1 Computer Architecture Layers
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- Magic‐1 Computer Bootloader Analysis
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- Magic‐1 Computer Emulator Technical Summary
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- Magic‐1 construction diagrams
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- Magic‐1 CPU Instruction Set Overview
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- Magic‐1 Emulator Project
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- Magic‐1 Emulator Project (not finish)
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- Magic‐1 Emulator Project Status Analysis
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- Magic‐1 Emulator Technical Information (no GUI version)
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- Magic‐1 Emulator Test Suite Documentation
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- Magic‐1 Hardware Initialization Procedure
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- Magic‐1 instruction set
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- Magic‐1 Instruction Set Reference
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- Magic‐1 Memory Map
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- Magic‐1 microcode
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- Magic‐1 Microcode Architecture
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- Magic‐1 Microcode Architecture: Loading Process
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- Magic‐1 Microcode Example
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- Magic‐1 Microcode File Format
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- Magic‐1 Page Table Flags
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- Magic‐1 Processor Architecture
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- Magic‐1 Runtime Initialization
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- Magic‐1 Signal Control and Interconnection Analysis
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- Magic‐1 system software
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- Magic‐1 Technical Architecture Specifications
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- Magic‐1 Verilog Implementation
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- mcode_rec_t structure as defined in mcode.h
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- Memory Map
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- Memory ranges used in this Bootloader code
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- Microcode Sequencer
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- MICROCODE_EXECUTOR
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- Minix FTP client
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- mknod
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- Modifying the bootrom and adding new features (soon)
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- Novel Magic‐1 Optimization Techniques Based on Documented Architecture
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- Null modem cable
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- Optimize register usage
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- Page table management
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- Paging
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- Part
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- Photo gallery of Magic‐1 computer
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- POST CODE
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- Practical implementation plan for the ideas for Magic‐1
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- Processor Commands
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- Programming on Magic‐1
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- Proper way to exit command line program
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- readclock
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- Registers & ALUs
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- retargeting lcc
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- Save
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- screendump
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- Serial Line Internet Protocol (SLIP)
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- Set
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- shutdown ‐h
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- Sieve of Eratosthenes ‐ a prime number generator
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- Source code for the M‐1 microcode
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- Telnet
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- temp
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- The assembler, "qas"
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- Unassigned resources
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- update
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- Using Magic‐1
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- Using memcopy instruction for block data transfers
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- Using specialized Magic‐1 instructions
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- Using the Front Panel Switches in Magic‐1
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- Virtual memory space for interpreted code
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- Visible Registers
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- We can optimize
bloader.c
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- Would need to implement system calls for VM
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