Control Lines - retrotruestory/M1DEV GitHub Wiki
Control Lines
All control lines are low active. They are:
- IRQ0, IRQ1, IRQ2, IRQ3, IRQ4 and IRQ5 - External interrupt request lines. Highest priority is IRQ0, lowest is IRQ5.
- DMA_REQ - Request control of address and data busses. Assert this line, then wait for DMA_ACK. At that point, you have control of the busses, but must keep DMA_REQ asserted until you're done with them. I expect the front panel to be the only user of this feature.
- DMA_ACK - See above.
- RESET - Asserting this line will cause the following:
- Internal memory address register (MAR) zeroed, which effectively sets PC to 0x0000
- SP zeroed
- Supervisor mode
- Paging off
- Interrupts disabled
- Condition codes (C,S,V,Z) reset
- IRQ0-IRQ5 reset (and internal halt FF reset)
- UARTS reset
- IDE interface reset