Implementation of Test Bank and Diagnostic Microinstructions - retrotruestory/M1DEV GitHub Wiki

Proposed microcode enhancements:

1. **Test Microinstructions Bank**

// Dedicated bank of 256 microinstructions for debugging and testing
TEST_BANK_START:
   TEST_INIT,        // Test initialization
   TEST_EXECUTE,     // Test execution
   TEST_VERIFY,      // Result verification
   TEST_REPORT       // Reporting

2. **Diagnostic Microinstructions**

typedef struct diagnostic_mcode {
    unsigned op:8;          // Operation code
    unsigned diag_mode:1;   // Diagnostic mode
    unsigned test_point:3;  // Test point
    unsigned verify:4;      // Verification bits
    // ...remaining microinstruction fields
} diagnostic_mcode_t;

3. **Checkpoint/Restore Mechanism**

- Ability to save and restore microcode state at any point
- Useful for debugging and testing new functionalities
- Requires no hardware modifications, only new microinstructions

4. **Self-Testing Microinstructions**

SELF_TEST_SEQUENCE:
   VERIFY_ALU,      // ALU unit test
   VERIFY_REGS,     // Registers test
   VERIFY_BUSES,    // Buses test
   VERIFY_MEMORY    // Memory test
These solutions:
- Require no significant hardware changes
- Can coexist with Bill's proposal for address space extension
- Facilitate debugging and testing
- Increase system reliability

Based on the Magic-1 documentation, here are practical steps to implement the proposed ideas:

1. **Implementation of Test Bank and Diagnostic Microinstructions**

// Add to microcode store (0x1fa-0x1fd slots)
0x1fa TEST_INIT:    ; TO_Z(R_MDR),L(R_A,LWORD),MISC(M_COMMIT),NEXT(FALLTHRU)
0x1fb TEST_EXECUTE: ; TO_Z(R_A),L(R_MDR,LWORD),NEXT(FALLTHRU) 
0x1fc TEST_VERIFY:  ; E_L(R_A),E_R(ER_MDR),ALU(OP_SUB,WORD,NO_CARRY),MISC(M_SET_FLAGS),NEXT(Fetch)

2. **Modification of the microinstruction structure for diagnostics**

// Modify mcode.h
typedef struct {
    // ...existing fields...
    unsigned diag_mode:1;   // New diagnostic mode bit
    unsigned test_point:3;  // Test point identifier
    unsigned verify:4;      // Verification flags
} mcode_rec_t;

3. **Checkpoint/Restore - Utilization of existing mechanisms**

// Add to bootloader (bloader.c)
void save_microcode_state() {
    // Save current microcode state to reserved memory area
    memcpy((void*)0x7F00, &mcode_store[0], sizeof(mcode_rec_t) * 512);
}

void restore_microcode_state() {
    // Restore from reserved memory area
    memcpy(&mcode_store[0], (void*)0x7F00, sizeof(mcode_rec_t) * 512);
}

4. **Self-testing microinstructions**

// Add to microcode store (available slots)
VERIFY_ALU:
   TO_Z(R_A),L(R_MDR,LWORD)         ; Load test value
   E_L(R_A),E_R(ER_MDR),ALU(OP_ADD,WORD,NO_CARRY) ; Test ALU
   MISC(M_SET_FLAGS),NEXT(Fetch)     ; Verify flags

VERIFY_REGS:
   TO_Z(R_A),L(R_B,LWORD)           ; Test register transfer
   TO_Z(R_B),L(R_A,LWORD)           ; Verify data integrity
   NEXT(Fetch)

5. **Implementation in the bootloader**

// Add to bloader.c
void run_self_test() {
    // Initialize test sequence
    to_post(0x01); // Signal test start
    
    // Run diagnostics
    if (!verify_alu()) {
        to_post(0xE1); // ALU error
        return;
    }
    
    if (!verify_registers()) {
        to_post(0xE2); // Register error
        return;
    }
    
    // Success
    to_post(0x00);
}

Key implementation aspects:

    We utilize unused slots in the microcode area (0x1fa-0x1fd)
    We add new control bits to the microinstruction structure
    We use the existing POST mechanism for signaling
    We utilize available registers to store test results
    We integrate with the existing bootloader

These changes require:

    Modifying microinstruction files
    Updating the bootloader
    Reprogramming the EPROMs
    Updating the documentation
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