Memory ranges used in this Bootloader code - retrotruestory/M1DEV GitHub Wiki
Here are all the memory ranges used in this bootloader code:
- Hardware Memory Mapped I/O:
0xFFA0
-0xFFA0
: Switches base0xFFC0
-0xFFC0
: Post code0xFFD0
-0xFFDF
: Real-time clock (RTC)0xFFE0
-0xFFE7
: UART1 (AUX)0xFFF0
-0xFFF7
: UART0 (CONSOLE)0xFF98
-0xFF9F
: Compact Flash interface0xFFB0
-0xFFB3
: IDE 8255 interface
- RAM/Memory Layout:
0x0000
-0x3FFF
: ROM code space (16KB)0x4000
-0x7FFF
: Device SRAM (16KB)0x8000
-0x8FFF
: Stack start and transfer buffer (PHYS0_XFER)0x9000
-0x9FFF
: Image transfer buffer (IMAGE_XFER)0xF800
-0xFFFF
: Device page mapping
- Process/Image Memory:
- Physical SRAM
0x00000
-0x0FFFF
: PID 0 code space - Physical SRAM
0x10000
-0x1F800
: PID 0 data space - Physical SRAM
0x20000
-0x27FFF
: Boot ROM and device SRAM copy
- Page Table Structure:
- Each process gets 32 pages (64KB) for code
- Each process gets 32 pages (64KB) for data when split
- Page size is 2048 bytes (PAGE_SIZE)
- Base code page = PID * 64
- Base data page = Base code page + 32 (for split processes)
- Cache/Buffers:
- Sector cache: 16 entries of 512 bytes each
- Block size: 8 sectors (4KB) for multiple sector reads
- Prefetch buffer: 512 bytes
- Line input buffer (LBUF_SIZE): 200 bytes
- Special Memory Locations:
0xFF00
: Fast boot flag location- Critical sectors mapped to dedicated cache slots:
- Sector 0: Boot/reserved sectors
- Sector 1: First FAT sector
- Sector 2: Image table sector
- Sector 10: Second FAT
- Sector 19: Root directory
This code manages memory using a paging system with:
- 2KB page size
- 32 pages per process space
- Support for both unified and split code/data spaces
- Special device page mapping at 0xF800-0xFFFF