Fixing Magic‐1 Emulator CPU Implementation Issues - retrotruestory/M1DEV GitHub Wiki
Collecting workspace information# Fixing Magic-1 Emulator CPU Implementation Issues
Looking at the error messages, there's a significant mismatch between the CPU class declaration in the header file and its implementation in the cpp file. The implementation contains many methods and member variables that aren't declared in the header.
The Problem
The cpu.cpp file is trying to use:
- Member variables that don't exist in the class declaration (
microcodePC
,CSR
) - Register fields that aren't defined (
MDR
,MAR
,Z
,N
, etc.) - Bus structures and methods that aren't declared
Solution Approach
We need to align the header and implementation by either adding the missing declarations to the header or modifying the implementation to match the header.
Let's first fix the most critical issues in cpu.cpp
:
// Look at the constructor issues first
CPU::CPU(Memory& mem) :
memory(mem),
state(State::RESET),
cycleCount(0),
// Remove microcodePC from here
registers(), // Initialize the registers structure
breakpoints(),
// Remove CSR from here
traceEnabled(false),
deviceData(0)
{
reset();
}
// Fix the reset method - replace with what's in the header
void CPU::reset() {
// Set initial register values
registers = {}; // Reset all registers to zero
registers.PC = 0;
registers.SP = 0xF000; // Default stack pointer
registers.MSW = 0x80; // Supervisor mode enabled
// Clear state variables
state = State::RUNNING;
cycleCount = 0;
pendingInterrupts = 0;
// Clear any breakpoints
breakpoints.clear();
watchpoints.clear();
}
// Add the missing implementation for disassembleInstruction
std::string CPU::disassembleInstruction(Word instruction) const {
std::ostringstream oss;
// Extract the opcode and operand
Word opcode = (instruction >> 8) & 0xFF;
Word operand = instruction & 0xFF;
// Disassemble based on the Magic-1 instruction set
switch (opcode) {
// System Operations
case 0x00: oss << "NOP"; break;
case 0x01: oss << "HALT"; break;
case 0x02: oss << "SYSCALL #" << std::dec << operand; break;
case 0x03: oss << "TRAPO"; break;
case 0x04: oss << "BPT"; break;
case 0x05: oss << "RETI"; break;
// Many more cases would go here...
default:
oss << "UNKNOWN " << std::hex << std::uppercase << std::setw(2) << opcode
<< " " << std::setw(2) << operand;
break;
}
return oss.str(); // Return the disassembled instruction
}
Next Steps
After fixing these immediate issues, we'll need to address:
- The
cpu.h
file to add missing declarations device.cpp
to remove duplicate definitionssystem.cpp
issues
The CPU implementation is complex with microcode-level simulation. I recommend:
- First fixing
disassembleInstruction()
to get past the immediate error - Then creating a plan to align your header and implementation
- Finally fixing the duplicate function definitions in device.cpp
Would you like me to provide more specific guidance on any of these steps?