it would be possible to double the microcode store from 512 to 1024 entries - retrotruestory/M1DEV GitHub Wiki

I'll give this some more thought, but I think I see a way. Right now each microcode instruction has an 8-bit address of the next to execute in the range 256..511 (0..255 are indexed by the opcode). If we could find another microcode bit, that would effectively double the available next addresses.
All bits are currently in use, but the PRIV bit is only used a few times.
I could move that functionality into an unused encoding of the MISC field and change the PRIV bit to an extended address bit EXT.
There is a small conflict in that there are a couple of microinstructions that use both the PRIV bit and a non-zero MISC field.
But, the microcode could be rewritten in those cases to avoid the conflict.

Next, A9 or pin 24, of the microcode EPROMs is currently tied to ground. We'd have to free this for each of the 5 EPROMS and tie it to EXT for extended address. Then, we'd have the ability to address 1024 words of microcode instead of 512. The next issue is increasing the number of possible opcodes. A classic way of doing this is to introduce a prefix opcode. This special opcode value would be interpreted to declare that the following byte is the real opcode and have it index into addresses 512..767. Microcode at addresses 768..1023 would be reached via the new EXT bit.

Bill

Changing the PRIV bit to EXT:

  • Move the functionality of the PRIV bit to an unused encoding in the MISC field.
  • Change the PRIV bit to the EXT bit, which will be used for extended addressing.

Changing EPROM wiring:

  • Disconnect pin A9 (pin 24) from the ground for all 5 EPROMs.
  • Connect this pin to the new EXT bit, which will allow addressing 1024 words of microinstructions instead of 512.

Implementing opcode prefix:

  • Introduce a special opcode prefix that will be interpreted as a declaration that the next byte is the actual opcode.
  • The opcode prefix will index addresses 512-767, and microinstructions at addresses 768-1023 will be accessed through the new EXT bit.

Modifying microinstructions:

  • Rewrite microinstructions that simultaneously use the PRIV bit and a non-zero MISC field to avoid conflicts.
  • Update microinstructions to utilize the new EXT bit.

Updating development tools:

  • Modify the assembler, debugger, and disassembler to support new instructions and the expanded microinstruction address space.

These changes will allow doubling the microinstruction address space with minimal hardware and software modifications.