Page Index - riscvarchive/riscv-CMOs-discuss GitHub Wiki

170 page(s) in this GitHub Wiki:

• Home
• new riscv-CMOs-discuss/wiki/Home.md
• RISC-V standard disclaimer
• RISC-V CMO proposal
• Arguments, Counter-Proposals, etc.
• Wiki TC of Pages
• Wiki Administrivia
• Non-CMO stuff to be deleted
• ======================================TOC spacer
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• Actual CMO Operations
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• Administrivia
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• Administrivia CMOS TG
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• Agenda for CMOs TG
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• An even quicker and dirtier summary of proposed instruction encodings for RISC V CMOs
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• Arguments against address range CMO.AR
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• Block memory operations such as MEMSET and MEMCOPY
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• CBO.UX vs CMO.ALL vs CMO.UR.asciidoc
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• CMO goals
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• CMO operation list for encodings
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• cmo_type CMO instruction flavor
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• CMOs (Cache Management Operations)
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• CMOs cut across many fields
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• CMOs Not Based on Memory Address
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• CMOs proportional to cache size rather than address range
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• CMOs proposal
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• CMOs WG Draft Proposed Charter
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• convenient short names for examples
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• draft actual CMO operations
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• draft CMO domains and levels
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• draft CMO instruction formats
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• draft CMO issues
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• Draft CMO proposals
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• draft CMO type spreadsheet
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• draft Fixed Block Size Prefetches and CMOs
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• draft Microarchitecture Cache Index CMO.UR CBO.UX
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• draft microarchitecture timing state flushes
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• draft Privilege for CMOs
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• draft Variable Address Range CMOs
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• Example: Config WG charter
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• Examples of other Working Group charters
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• Extended CMO types
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• Fixed Block Size Prefetches and CMOs
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• generated HTML and PDF for CMOs proposal
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• hack relative URLs in github project wiki repo
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• How to search this wiki, repo, issues, etc.
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• I am frustrated that we are going around in circles with respect to modulation of CMOs
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• in band tagging pointers
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• Instructions that Support Partial Progress
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• interception, modulation, and mapping of CMOs
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• ISSUE process migration argues for whole cache invalidation operations and against the partial progress loop construct
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• Mailing lists interested in CMOs
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• Mandatory versus Optional CMOs, PREFETCHES, and CPHs
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• Meeting 11 09 2020
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• microarchitecture range loop
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• Microarchitecture Structure Range CMOs
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• Motivation for Address Range CMO.AR
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• No data value dependent exceptions for RISC V
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• Non CMO stuff to be deleted
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• Non temporal loads vs CMOs in loops
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• Overview of CMO operations
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• Privilege for CMOs
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• Problems editing GitHub wiki using speech recognition
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• Process migration while performing multiple cache block operations together
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• Quantization, dequantization, and interpolation instructions for DL, math, etc.
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• Quick and dirty list of Actual CMOs
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• Quick and Dirty Proposal for RISC V CMOs
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• Ri5 CMOs proposal
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• RISC V CMO proposal
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• RISC V needs CMOs, and hence a CMO Working Group
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• RISC V standard disclaimer
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• Sectored Cache Terminology
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• Semantics of Whole Cache Flushes CMO.ALL
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• Semantics of Whole Cache Flushes CMO.ALL with Process Migration
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• Sharing Drawings and Diagrams
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• SourceDest to support Exception Transparency
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• STATUS almost done maybe
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• techpubs
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• techpubs info
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• Terminology for instructions that manage microarchitecture state such as caches, prefetchers and predictors
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• terminology notation
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• TOC Table of Contents
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• Variable Address Range CMOs
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• Variable Address Range Instructions like CMOs, MEMSET, MEMZERO, and MEMCOPY
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• variable address range loop
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• Virtual or Physical CMO instruction flavor
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• voice typos editing this wiki
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• Why CMOs.xlsx was written in Excel
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• Wiki and Repo crosslink issues
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• wiki stuff: Notes on GitHub wiki pages
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