OSNT - NetFPGA/OSNT-Public GitHub Wiki

Location

osnt/code/projects/osnt

IP Cores

• OSNT Specific cores
  • 10G MAC Interface v1.20
  • Monitoring Output Port Lookup
  • Packet Cutter
  • Stamp Counter
  • PCAP Replay Engine
  • Inter Packet Delay
  • Rate Limiter
  • Extract Metadata
• NetFPGA-10G Specific cores
  • DMA
  • MDIO Engine
  • Input Arbiter
  • BRAM Output Queues
  • NIC Output Port Lookup
• Xilinx AXI Peripheral
  • axi_interconnect
• Microblaze Subsystem
  • MicroBlaze
  • lmb_v10
  • lmb_bram_if_cntlr
  • bram_block
  • proc_sys_reset
  • clock_generator

Description

This is the combination of the [OSNT Traffic Generator](OSNT Traffic Generator) and [OSNT Traffic Monitor](OSNT Traffic Monitor) features into single FPGA device and single card. Using high-precision timestamping of departing and arriving packets, we can perform full line-rate, per-flow characterization of a network (device) under test. The software provided within the aforementioned projects can be also used for this one.

TX TIMESTAMP FEATURE: Enabling the TX TIMESTAMP feature can be done from the Generator CLI located in ~/OSNT/code/osnt_sw/apps/tools/osnt_generator/cli . Once enabled, part of the packet data to be transmitted is being overwritten with the following information:

• Static Signature: 0xdeadbeef
• Packet counter (32 bit)
• TX Timestamp (64 bit)

The system inserts the information at the requested offset (The value provided in the TX Timestamp offset register is multiplied by 32 to select the exact location in the packets in terms of bit)