The Quartus tool-chain has a built-in (though somewhat restricted) copy of the Mentor Modelsim simulation tool. Using this, you can verify and/or debug multicomp design changes. This can be far quicker and more insightful that programming an FPGA and trying it out.

This set of pages describes how to get started, how to write test programs and how to go about debugging using waveforms and code breakpoints.

Prerequisites

The descriptions here assume a certain amount of background knowledge in the reader. In particular, you should:

• Have Quartus installed and running
• Have the multicompPCB project set up
• Know how to rebuild the project and reprogram the FPGA with the generated image
• Know how to write simple 6809 assembler programs
• Have a 6809 tool-chain set up allowing you to assemble and link aforementioned programs
• Be familiar with the multicompPCB hierarchy (eg, the different blocks and vaguely how they connect together)
• Be comfortable looking at waveforms and schematics
• Be familiar with digital design (at least, the distinction between combinational logic like a decoder and sequential logic like a counter or state machine). You need not be a VHDL expert.

If you want to simulate a multicomp design using a processor other than the 6809 I suggest that you follow the steps here with the 6809 design. It should then be clear how to apply your learning to some other processor or design variant.

All of my work has been done using the Linux version of Quartus. It should all work with Windows also (I welcome any feedback on windows-related differences).

These notes have not yet been beta-tested by anyone so there may be errors. If you try to follow them and encounter errors, please let me know and I will try to help you and document the changes. Likewise, if you try to follow them and it all works out as described, I'd like to know that, too.

Background/Overview

TODO UUT DUT testbench

Setup

Your file structure should look like this:

multicomp/
multicomp/Components/
multicomp/ROMS
multicomp/MicrocomputerPCB
multicomp/MicrocomputerPCB/simulation
multicomp/MicrocomputerPCB/simulation/modelsim

On your machine, the directory shown as "multicomp" may have a different name. The "modelsim" directory may not exist; if it does not exist, use mkdir to create it.

Alongside the "modelsim" directory, use ln -s to create soft links named ROMS and Components which link to the real directories (multicomp/Components and multicomp/ROMS respectively) so that the structure looks like this:

multicomp/
multicomp/Components/                         <-------+
multicomp/ROMS                                <----+  |
multicomp/MicrocomputerPCB                         |  | Soft links
multicomp/MicrocomputerPCB/simulation              |  |
multicomp/MicrocomputerPCB/simulation/modelsim     |  |
multicomp/MicrocomputerPCB/simulation/ROMS      ---+  |
multicomp/MicrocomputerPCB/simulation/Components   ---+

In the modelsim/ directory, create the two files multicomp_sim.do and multicomp_wave.do -- see resources below.

First simulation

Simulation is a 3-stage process. First, you must compile the design components. Second you must elaborate the design and finally you can simulate. For a C programmer these three steps are analagous to compiling, linking an executing a multi-source-file program.

Compilation

Start Quartus and open the project MicrocomputerPCB. Select the menu item Tools->Run Simulation Tool->RTL Simuation. After a few seconds, the simulator window should appear. It's labelled "Modelsim ALTERA STARTER EDITION".

Within the simulator window there are multiple other windows. You can resize, undock them etc, etc. but don't do that now; leave them the way they are. You should see that the bottom window, along the whole width of the parent window, is labelled "Transcript" and there should be some messages scrolling up for a few seconds, finally followed by the "ModelSim>" prompt. That was the compilation process.

If you see a lot of text in red, that an indication that something went wrong; you need to scroll up through the messages, find out what went wrong and fix it.

If the compilation was successful, the messages should look like this: Multicomp compilation log

Recompiling after a design change

If there is a setup error you will probably have to close and restart the simulator. However, if there is an RTL error you can edit/save the RTL (eg, using the Quartus editor) and recompile without the need to restart the simulator.

To recompile, mouse1-click in the Transcript window and press the up-arrow key to recall the previous command (you didn't type it; it was provided by Quartus when it launched the simulator). It should look like this:

do MicrocomputerPCB_run_msim_rtl_vhdl.do

The command language used by the simulator is TCL. Scripts conventionally have the extension ".do" and are sometimes referred to as "do-files". The file MicrocomputerPCB_run_msim_rtl_vhdl.do was created automatically by Quartus and it references all of the files that make up the design together with appropriate libraries. The command "do" invokes a script. Press return and the compilation will be re-run.

As an alternative to pressing up-arrow, typo "do " (d o space). You will see syntax hints appear. Type "M" (shift m). You will see command completion options appear. Use the arrow keys or mouse wheel/button-1 to select the "MicrocomputerPCB_run_msim_rtl_vhdl.do" and press return.

Elaboration

When you have compiled successfully, you can elaborate the design. Identify the window labelled "Library". Within that window, identify the item named "work" and mouse1-click on the + to expand it. Once expanded, you should see an item within it named "microcomputer", which is of type Entity. Mouse1-double-click on that ato elaborate "microcomputer" which is our simulation top-level or device-under-test (DUT).

If the elaboration was successful, the Transcript window should show a set of messages (in blue) look like this: Multicomp elaboration log

As before, you can see what command caused this behaviour (and repeat it directly at the ModelSim> prompt) by pressing the up-arrow key. This should show that the command was: vsim work.microcomputer.

Simulation

Select the Transcript window and type this command at the ModelSim> prompt:

do multicomp_wave.do

This should bring up a waveform display. Select the Transcript window a second time and type this command at the ModelSim> prompt:

do multicomp_sim.do

This command applies reset and clock and allows simulation time to proceed. After a few seconds, the Transcript window should issue the ModelSim> prompt again. Select the Waveform window and explore. Try to make sense of what's going on. The design is coming out of reset and starting to execute from ROM. Observe:

TODO describe some stuff to look at.

Writing a test program

TODO no RAM with external build (so no stack) can do external RAM write but not read. See Fear of the Unknown.

Inspecting the design using the waveform viewer

TODO

Source-code debugging

TODO

Resources

TODO multicomp_sim.doandmulticomp_wave.do`