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c5xtools wiki

A complete reference for programming the Texas Instruments TMS320C5x family of 16-bit fixed-point digital signal processors, and for the c5xtools toolchain (assembler, linker, hex/ROM converter and disassembler) that targets them.

Everything here is cross-checked against the original Texas Instruments documentation listed in References. The two normative sources are:

  • TMS320C5x User's Guide (TI literature number SPRU056D, 1998): architecture, registers, addressing modes and the instruction set.
  • TMS320C1x/C2x/C2xx/C5x Assembly Language Tools User's Guide (SPRU018D, 1995): source syntax, directives, the macro language, COFF, the linker command language and the hex-conversion formats.

This wiki does not reproduce those manuals. It is an independent, plain-text explanation of the same facts, with every opcode, field width and register name verified against them.

What the processor is

The TMS320C5x is a 16-bit fixed-point DSP built around a 32-bit accumulator, a 16x16 hardware multiplier, eight auxiliary registers with their own address arithmetic unit, a hardware stack, and a 64K-word program space plus a 64K-word data space. It descends from the 'C1x/'C2x/'C2xx line and is largely upward compatible in source form with them.

What c5xtools is

A modern, dependency-free, clean-room implementation of the classic development flow, in portable C99:

Tool Role
c5xasm assembler: source to a TI COFF object (or a flat word listing)
c5xlnk linker: COFF objects to an absolute or relocatable image
c5xhex converter: COFF to Intel-HEX / Motorola-S / TI-tagged / ASCII / bin
c5xdis disassembler: image back to re-assemblable source (byte-exact)

The output contract (COFF layout, instruction encodings, hex record formats) matches the TI tools described in SPRU018D.

The assembler and disassembler target the 'C5x; the linker and hex converter cover the wider 'C2x/'C2xx/'C5x COFF family. Compatibility with other TMS320 families is unverified - see Processor-family support.

How this wiki is organized

The planned pages, in reading order:

  1. The processor
    • Architecture Overview (buses, CPU, memory, peripherals)
    • CPU and Registers (CALU, PLU, ARAU, accumulator, ST0/ST1, PMST)
    • Program Control (PC, stack, conditional ops, RPT/RPTB, interrupts, reset)
    • Addressing Modes (direct, indirect, immediate, dedicated-register, memory-mapped, circular)
    • Memory and I/O (program/data/I-O spaces, memory-mapped registers)
  2. Writing assembly
    • Assembler Syntax (source statement format, constants, symbols, expressions)
    • Assembler Directives (full reference)
    • Macro Language
  3. The instruction set
    • Instruction Set (notation, functional grouping, and one section per instruction, all on one page, plus instruction timing (cycle classes))
  4. Building a program
    • COFF and Sections
    • Linker (MEMORY and SECTIONS command language)
    • Hex Conversion (record formats, ROM width, byte order)
  5. The tools

Conventions

  • All pages are plain 7-bit ASCII.
  • Numbers follow the assembler's own notation: a trailing h is hexadecimal (for example 200h), a trailing b is binary, a leading # marks an immediate operand.
  • Bit 0 is the least significant bit. Word means a 16-bit word.

License

MIT - (c) 2026 Grzegorz Worona [email protected]. See LICENSE.


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