Electronics System Architecture - thepinkmile/Enigma-NG GitHub Wiki
Enigma-NG System Architecture
Status: Draft Project: Enigma-NG Author: Izzyonstage & GitHub Copilot Version: v1.0.0 Associated Hardware Revision: Rev A Last Updated: 2026-04-20
1. Board Hierarchy and Physical Structure
The Enigma-NG system comprises the following boards:
- Controller Board (CM5) โ Raspberry Pi CM5 carrier and the mechanical motherboard of the machine. Hosts the external RJ45, Ethernet ESD/magnetics, PoE front-end, HDMI, USB 3.0, and the dock interfaces to both the Power Module and the Stator.
- Power Module โ Removable power-conditioning / UPS cartridge. Accepts local USB-C and battery
inputs plus a regulated PoE-derived auxiliary feed from the Controller; generates
5V_MAINand3V3_ENIG, manages hold-up energy, and remains the only intentionalGNDโGND_CHASSISbond. - Stator โ Removable vertical daughterboard mounted from the enclosure wall. Receives power and logic from the Controller through two hybrid blind-mate connectors; fans power and JTAG into the rotor stack and hosts the routing / reflector CPLD.
- Settings Board โ Panel-mount switch and RGB indicator board on the shared Stator
I2C-1bus; provides user-facing routing/reflector configuration input. - Rotors (ร30) โ Arranged in groups of 5, chaining directly output-to-input. An Extension Board sits between each group of 5 to re-buffer broadcast signals.
- Extension Board (up to ร5 within Rev A power budget) โ Bridges between rotor groups; re-buffers TCK and TMS. Minimum configuration: Stator โ [5 Rotors] โ Reflector (0 Extensions, 5 rotors). Full build: 6 groups of 5 rotors separated by 5 Extension boards, terminated by the Reflector (30 rotors total).
- Reflector โ Mandatory end-of-chain turnaround board after the final rotor; provides the physical
ENCreturn path and routesTTD_RETURNback to the Stator while the selected reflection map is applied by the Stator CPLD. - Encoder Modules (ร6) โ 1
KBD_ENC, 1LBD_DEC, and 4 plugboard modules (PLG_PASS1_DEC,PLG_PASS1_ENC,PLG_PASS2_DEC,PLG_PASS2_ENC). Connect to the Stator in three banks of two identical 26-pin IDC ports. - JTAG Daughterboard โ USB Blaster II implementation for programming CPLDs.
Physical Chain
external RJ45 / HDMI / USB3
|
Controller Board
/ \
J1/J2/J3 J4/J5
| |
Power Module Stator
|
J1โJ3 Rotor 1
ยท
Rotor 5
|
Extension 1
|
Rotor 6
ยท
Rotor 30
|
Reflector
|
TTD_RETURN -> Stator J10
The Power Module and Stator are both removable daughtercards. The Controller is the fixed mechanical reference that mates to both boards and owns all enclosure-edge I/O.
2. Interconnect Architecture
2.1 Controller โ Power Module
The Controller โ Power Module dock uses three 10-position TE 2.5 mm board-to-board connectors:
| Link | Function | Controller side | Power Module side |
|---|---|---|---|
| J1 | Main regulated rails (5V_MAIN, 3V3_ENIG, GND) |
TE 1-1674231-1 receptacle |
TE 1123684-7 plug |
| J2 | Regulated PoE-derived auxiliary input (VIN_POE_12V + GND) |
TE 1-1674231-1 receptacle |
TE 1123684-7 plug |
| J3 | Low-speed control / telemetry (I2C-1, PM_IO_INT_N, PWR_GD, ROTOR_EN, PWR_BUT) |
TE 1-1674231-1 receptacle |
TE 1123684-7 plug |
Functional allocation:
- J1:
3 ร 5V_MAIN,2 ร 3V3_ENIG,5 ร GND - J2:
3 ร VIN_POE_12V,7 ร GND - J3:
I2C1_SDA,I2C1_SCL,PM_IO_INT_N,PWR_GD,ROTOR_EN,PWR_BUT,4 ร GND
Reference PDFs: TE-1-1674231-1-datasheet.pdf,
TE-1123684-7-datasheet.pdf
2.2 Controller โ Stator
The Controller โ Stator dock uses two Molex EXTreme Guardian HD hybrid connectors:
| Link | Function | Controller side | Stator side |
|---|---|---|---|
| J4 | 5V-biased power dock | Molex 2195630015 receptacle |
Molex 2195620015 plug |
| J5 | 3V3/JTAG/I2C dock | Molex 2195630015 receptacle |
Molex 2195620015 plug |
Functional allocation:
- J4 power blades:
4 ร 5V_MAIN,1 ร GND - J4 signal field: additional
GNDreturns / guards - J5 power blades:
4 ร 3V3_ENIG,1 ร GND - J5 signal field: guarded
TCK,TMS,TDI,TTD_RETURN,I2C1_SDA,I2C1_SCL, with all remaining signal contacts tied toGND
The small signal contacts are valid current-carrying return paths as well as guards; the family specification rates them at 4.5 A/contact.
Reference PDFs: Molex-2195630015-datasheet.pdf,
Molex-2195630015-drawings.pdf,
Molex-2195620015-datasheet.pdf,
Molex-2195620015-drawings.pdf,
Molex-ExtremeGuardianHD-2141130000-PS-000-specification.pdf
2.3 Rotor-Stack Connectors
All rotor-stack interconnects remain on the Samtec Edge-Rate series 0.8 mm board-to-board connectors:
- ERM8 โ male header (originating / input side of a connection)
- ERF8 โ female socket (receiving / output side of a connection)
These connectors are used only for the rotor / extension / reflector chain.
3. Power Architecture
The Power Module produces two rails from three upstream sources:
- Controller-fed PoE auxiliary:
VIN_POE_12Venters the PM from the Controller after the RJ45, PoE PD, transformer, and cable-entry EMI/ESD stages. - Local USB-C PD input: handled on the Power Module.
- Local smart-battery input: handled on the Power Module.
Generated rails:
- 5V_MAIN โ Up to 12A; dual-phase interleaved
LMQ61460-Q1 - 3V3_ENIG โ Clean 3.3V;
TPS75733KTTRG3LDO post-regulator
Grounding Rule
The Controller may implement local shield/chassis handling for enclosure-entry connectors such as RJ45,
but the only intentional DC bond between GND and GND_CHASSIS remains on the Power Module at the
main power-entry boundary before the eFuse. No second bond is permitted on the Controller or Stator.
3V3_ENIG Power Flow
Power Module (TPS75733KTTRG3 LDO)
-> Controller Board (via J1)
-> Stator (via J5 power blades)
-> Rotor group 1
-> Extension reinjection points
-> final reflector return harness
4. JTAG Serial Chain (TTD Net)
TTD Net Name
The JTAG serial chain data pin is designated TTD (JTAG Transmission Data) at pin 6 on all rotor-stack JTAG connectors. This unified name avoids TDI/TDO direction confusion:
- On the input side (J1 pin 6): TTD carries incoming TDI from the previous stage.
- On the output side (J4 pin 6): TTD carries outgoing TDO to the next stage's TDI.
Serial Chain Path (Controller -> Reflector -> TTD_RETURN)
Controller J5
-> Stator CPLD
-> Stator J1 pin 6 (TTD out)
-> Rotor 1 ... Rotor 30
-> Reflector J1 pin 6 (TTD in)
-> Reflector J4 pin 15 (TTD_RETURN)
-> Stator J10 pin 15
-> Controller J5
TCK and TMS โ Broadcast Signals
TCK and TMS are broadcast signals. They leave the Controller via the Stator J5 logic dock
and then propagate through the rotor chain in parallel.
Extension Board Signal Buffering
Every 5 rotors, an Extension board re-buffers TCK and TMS using a 74LVC2G125 dual-buffer IC
(U1). TTD is NOT buffered at Extensions โ it is a serial chain signal and must pass uninterrupted
through each CPLD.
Signal Integrity
| Component | Location | Value | Purpose |
|---|---|---|---|
| TTD path | Rotor stack board-to-board hops | Direct | No per-rotor series resistor on the BtB chain |
| R1 | Reflector TTD input | 22ฮฉ series | Reflector end-of-chain TTD termination |
| R2 | Each Rotor | 10kฮฉ pull-up | TMS default-high |
| R3 | Each Rotor | 10kฮฉ pull-up | TDI default-high |
| R4 | Each Rotor | 10kฮฉ pull-down | TCK default-low |
| R5 | Each Rotor | 10kฮฉ pull-up | SYS_RESET_N default-high (inactive) |
5. I2C Topology
All system management devices remain on the single shared I2C-1 bus:
| Address | Device | Location | Function |
|---|---|---|---|
| 0x09 | LTC3350 | Power Module | Supercap charger/monitor |
| 0x0B | Smart Battery | Power Module | SMBus battery monitoring |
| 0x28 | STUSB4500 | Power Module | USB-C PD controller |
| 0x3F | PCA9534A | Power Module | PM-local status + SW1 RGB handoff expander |
| 0x40 | INA219 | Power Module | 5V_MAIN telemetry |
| 0x45 | INA219 | Stator | Rotor-stack telemetry |
| 0x20 | MCP23017 | Stator | ENC monitoring |
| 0x21 | MCP23017 | Stator | Virtual keypress + servo control |
| 0x22 | MCP23017 | Stator | CPLD config output driver |
| 0x23 | MCP23017 | Settings Board | Switch input reader |
| 0x24 | MCP23017 | Settings Board | Bank 1 LED controller |
| 0x25 | MCP23017 | Settings Board | Bank 2 LED controller |
| 0x60 | PCA9685 | Stator | Servo PWM driver |
The PM-local expander uses the address block adjacent to the PM INA219 so PM devices remain grouped in
i2cdetect output.