Programming Model

ISA Registers

There are 16 ISA registers. These registers are duplicated for the 16 interrupt levels giving a total of 256 registers.

The registers can be accessed in pairs for a 16 bit value. These pairs are named A, B, X, Y, Z, S, C and P.

The 8 bit registers are AU, AL, BU, BL, XU, XL, YU, YL, SU, SL, CU, CL, PU and PL

For the MUL and DIV instruction, the registers can be grouped and accessed as a 32 bit word. The groups are A/B, X/Y, Z/C and S/P. If B, Y, C or P is provided as an operand to these instructions then only part of the result is stored, for MUL it is the low 16 bits, for DIV it is the quotient.

A Register

Accumulator. Certain operations have the A register as an implicit operand. Some memory operations which index the A register are optimised.

B Register

Alternate Accumulator. Certain operations have the B register as an implicit operand.

X Register

Index register. The X register holds the return address for JSR and SVC instructions.

Y Register

Z Register

S Register

Stack Pointer.

C Register

Context Register

The context register at any level holds the condition codes and map register for each Interrupt Level. The context also provides the previous Interrupt Level so that the handlers can return correctly.

15 14 13 12	11 10 9 8	7	6	5	4	3	2 1 0
Previous Level	Unknown	V	M	F	L	Unknown	Map

P register

Saved PC. The P register holds the PC to be used when moving to a new interrupt level. It's also saved during some memory instructions (big number, memory block at least) as the address of the next instruction.

CPU6 Hardware Registers

Current Interrupt Level Register

Map Register

Register Index Register

Data bus output register

Machine Address Register

Work Address Register

Result Register

ALU Flags Register

Status Register

AM2901 ISA Registers

The register file in the AM2901 ALUs contains specific registers which are accessed through the ISA.

Register 6, 10, 11, 12 and 13 are dedicated to specific functions. Register 9 must be set to the value of the Register Index if that needs to persist across DMA operation within an instruction execution.

Register 6

Internal Status register.

7	6 5 4	3	2 1 0
Trap on overflow	Current Map	Sign for big number results	DMA Map

Register 12/13

DMA Address Register

Register 10/11

DMA Count Register

Register 9

Register Index copy, used to restore the register index if an interrupt condition overwrites it.

Register 5/7

Used as source address for big number and memory operations

Register 1/2

Used as destination address for big number and memory operations

Register 3

Used as source/destination (confirm) count for big number and memory operations

Register 8

Used as source/destination (confirm) count for big number and memory operations