Extended Addressing - sjsoftware/centurion-cpu6 GitHub Wiki
Extended Addressing Modes
These modes are used by the Page Table, Big Number and Memory Block instructions. They are provided for variable length operands. The operand length is provided either as an additional operand to the instruction or in an implicit register operand. If the length is not able to be determined, then literal (immediate) operands are not permitted.
There are four extended addressing modes:
Direct
590/190
Indexed Displacement
594/194
Indexed
598/198
Literal
59c/19c
Note 59c -> trap, can't do an literal/immediate if we don't know how long it is!
Mode 1:
(May be incorrect)
Form of operand is EA = (r1 + r2 + disp), not sure how this was formatted for XASSM.
displacement is either 8 bits signed or 16 bits, if r1 is odd then 16 bits, otherwise 8 bits.
If r2 is 0 (A register) then EA = (r1 + disp).
r1 is evened out e.g., if r1 is 3 then register 2 (B register) is used.
r2 must be even.
| Byte n | Byte n + 1 | Byte n + 2 |
|-------------|--------------------------------|--------------------------------|
| 7654 | 3210 | | | | |
| r1 r2 | 8 bit disp or 16 bit high byte | 16 bit low byte if 16 bit disp |
Mode 2:
EA = (R)
| 7 6 5 4 | 3 2 1 0 |
| Op1 Register Op2 Register |
If both operands are mode 2, then only one byte is used, otherwise the nibble for the other operand register is ignored.
Odd registers are illegal