Experiment 3: 10 bit binary switch values on three 7 segment displays - ml7715/VERI-Laboratory GitHub Wiki

The following verilog top module was created in order to map a 10-bit binary number (defined using the switches on the FPGA) to three 7-segment displays which will display the correspondent hexadecimal value.

module ex3(SW,
	   HEX0, HEX1, HEX2);
				
	input [9:0] SW;
	output [6:0] HEX0;
	output [6:0] HEX1;
	output [6:0] HEX2;
	
	hex_to_7seg SEG0 (HEX0, SW[3:0]);
	hex_to_7seg SEG1 (HEX1, SW[7:4]);
	hex_to_7seg SEG2 (HEX2, SW[9:8]);
	
endmodule
'''

Three hex_to_7seg modules were initialized and linked to the necessary hardware.