Representing Logic gates using MUX - mbits-mirafra/digitalDesignCourse GitHub Wiki
Representing Gates using MUX
AND gate Using MUX
1.Select One of the Input as select line
| A | B | Y |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
For example let's say that you choose select line as A.
When A = 0 then irrespective of B(the other input ) Output will be 0. So I0 takes value 0.
When A = 1 then output is same as the Other input (B) .So I1 takes value B.
** NAND Gate using MUX**
| A | B | Y |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
NOR gate using MUX
| A | B | Y |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
NOT gate Using MUX
| A | Y |
|---|---|
| 0 | 1 |
| 1 | 0 |
OR gate Using MUX
| A | B | Y |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
EX-OR gate Using MUX
| A | B | Y |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
EX-NOR Implementation using MUX
| A | B | Y |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |