XPS_Block_Class_Reference - david-macmahon/wiki_convert_test GitHub Wiki

The XPS Block class is used for object instances representing "yellow block" interfaces in a Simulink design.

An XPS Block object (sometimes referred to as an "xps_object") is created for each for each "yellow block" in the Simulink design. The object's fields are used to store instance-specific parameters, while its methods are called by the toolflow in the generation of the EDK project.

Class Properties (Fields) Summary

• Preset by xps_object class constructor
  • simulink_name: the full hierarchical name of the block in Simulink
  • parent: the full hierarchical name of the block’s parent in Simulink
  • xsg_obj: the xps_block object of the XSG Core Config block in the design
  • type: the yellow block’s tag label, converted to xps interface type format
• Customizable for each new child class
  • ip_name: a string that specifies the EDK pcore to instantiate
  • ip_version: a string that specifies the version of the EDK pcore to instantiate
  • supp_ip_names: a cell array that specifies supplemental EDK pcores to instantiate
  • supp_ip_versions: a cell array that specifies the versions of supplemental EDK pcores
  • opb_address_offset: a decimal number that sets the address space in bytes to allocate on the OPB bus
  • plb_address_offset: a decimal number that sets the address space in bytes to allocate on the PLB bus
  • opb_address_align: a decimal number that specifies the OPB bus address alignment
  • plb_address_align: a decimal number that specifies the PLB bus address alignment
  • ports: a structure that defines the ports on the XSG design IP core
  • ext_ports: a structure of cell arrays that defines the IP’s external ports in the EDK project
  • misc_ports: a structure of cell arrays that defines ports on the IP core that don’t pass through the Simulink design
  • buses: a structure of structures of cell arrays that specifies bus connections to the XSG design IP core
  • interfaces: a structure that specifies bus connections to the IP core
  • parameters: a structure that specifies parameters passed to the pcore instantiation
  • soft_driver: a string name of an EDK software driver to include
  • c_params: a string that specifies parameters passed to software
  • borph_info: a structure that specifies details for the BORPH interface

Class Methods Summary

• display: displays object parameters; for debugging purposes
• drc: runs design rule checks
• gen_borf_info: generates entries in BORPH table
• gen_c_core_info: makes C address mapping info available externally
• gen_cmds: adds C commands needed for interfacing to block from the TinySH command line
• gen_mhs_ip: writes the MHS instantiation of the interface block
• gen_mhs_xsg: generates the MHS instantiation for the XSG design IP core
• gen_mpd: writes the MPD for the XSG design IP core
• gen_mss: writes the MSS instantiation of the interface block
• gen_src_files: generates special software
• gen_src_main: generates special software
• gen_ucf: adds UCF entries needed by the instantiation of an interface block
• probe_bus_usage: sets flag for bus (PLB or OPB) usage