Si cryogenic etch - NanoLabStaff/nanolab GitHub Wiki

by Kai Sandvold Beckwith ([email protected])


  1. Apply etch mask (Alumina-mask)

     Use photoresist (negative or positive), see separate protocol
     Alternatively, apply hardmask via lift-off/etch-back process, 
     alumina or Al/alumina recommended, see separate protocol.
    
  2. Chamber clean

     Clean using one of the standard chamber cleaning recipes. 
    
  3. Chamber condition

     Run your etch recipe (see below) for 10-20 minutes.
    
  4. Insert sample

     If not using full 2" wafer, fix sample to alumina carrier wafer 
     using a very small droplet of Fomblin oil. Ensure entire samples 
     has contact with the oil for good thermal conduction, while also 
     ensuring no oil is exposed outside the sample.
    
  5. Strike

     The same recipe as below, but with RF=10W, p=10mtorr, SF6=20 sccm. 
     Let the recipe run for 7-10 s to stabilize. 
     Remember to keep "HOLD ON" to ensure plasma remains lit.
    
  6. Standard etch recipe:

     SF6: 90 sccm
     O2: 10-11.5 sccm
     RF power: 4W
     ICP power: 750W
     T=-120°C
     Helium pressure: 10 torr
     Chamber pressure: 7.5 mtorr
     Time: Etches about 1,45µm/min.
    
  7. Optional: post-processing:

    Remove alumina/aluminum mask by 5 minutes in MF-26 developer.
    Apply fluorosilane by vapor-phase silanization for anti-sticktion.
    

Expected results:

If all goes well, quite straight sidewalls should be obtained with this recipe, as shown in the images below. The selectivity to photoresist is typically about 1:10, while the selectivity to alumina is at least 1:1000. Selectivity should be high to SiO2 as well, but this has not been tested. The roughly 45° structure at the base of large features is due to crystallographic-dependent etching at low temperatures. Ways around this have not been found at the moment, but the problem is less pronounced for shallower features.

edge well

Tips and tricks:

  • Tuning O2 in the range of 10-11.5 sccm tunes surface roughness of the etched surfaces versus straight sidewalls. 10 sccm gives slightly undercut sidewalls, but quite smooth surfaces, while 11.5 sccm gives completely verticle sidewalls but a rougher surface. Note that different masks might require slighly different settings, this recipe has been optimized for alumina masks.

  • Increasing ICP power increases etch rate, but also increases undercut and mask erosion rate.

  • Increasing RF power reduces roughness issues, but also decreases mask selectivity.

  • The other parameters could also be tuned, the user is recommended the following literature for more details: Guidelines for cryogenic etching. The black silicon method VIII.

  • 1mm wafers are not recommended, results are erratic, perhaps due to inadequate cooling.

  • If the resulting roughness of the etches surfaces is an issue, etch-stop layers could be used.

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