Processor Status FLAGS - Falmouth-Games-Academy/comp310-wiki GitHub Wiki

Flags

Processor status flags (P) come from the flags register, one of six architectural registers within the 6502 CPU family. P is composed of six one bit registers (instructions) which modify one or more bits[1].

There is a lack of standardisation when it comes to the names of the flags. Within some of the sources cited below, they go into depth on more specialist uses of the particular flags, other sources give a brief and somewhat unhelpful description the names of the given flags are often changed. Their order and single letter identifier remain constant.

Definitions

Cleard = bit set to 0 Set = bit set to 1

Brief Overview

7  bit  0
---- ----
NVss DIZC
|||| ||||
|||| |||+- Carry: 1 if last addition or shift resulted in a carry, or if
|||| |||     last subtraction resulted in no borrow
|||| ||+-- Zero: 1 if last operation resulted in a 0 value
|||| |+--- Interrupt: Interrupt inhibit
|||| |       (0: /IRQ and /NMI get through; 1: only /NMI gets through)
|||| +---- Decimal: 1 to make ADC and SBC use binary-coded decimal arithmetic
||||         (ignored on second-source 6502 like that in the NES)
||++------ s: No effect, used by the stack copy, see note below
|+-------- Overflow: 1 if last ADC or SBC resulted in signed overflow,
|            or D6 from last BIT
+--------- Negative: Set to bit 7 of the last operation

Figure 1

Image Processor Status register and the location of the flags (Edited)

Imgur 11(http://www.weihenstephan.org/~michaste/pagetable/6502/6502.jpg)

Bit 0 C ~ Carry Flag

The contributor(s) of 5(http://www.obelisk.me.uk/6502/registers.html) have little to say about the carry flag. That the carry flag is changed if the last operation caused an overflow from either bit 7 or bit 0. It is common to see this bit cleared before comparison operation with the CLC flag. They also state how the bit is set or cleared during arithmetic operations, comparisons and during logical shifts. For instance, a CLC instruction before an ADC instruction is necessary as the ADC (add with carry) instruction takes into account the carry flag value. Similarly, the SEC instruction is used before an SBC (subtract with carry) as it takes into account the NOT carry flag value. The author(s) of 6(http://codebase64.org/doku.php?id=base:6502_registers) claim that the carry flag can be used " as a 9th bit and lets you chain operations to calculate with bigger than 8-bit"6(http://codebase64.org/doku.php?id=base:6502_registers). They do not elaborate on how this may be done, but the Multiplication page in this wiki has a good explanation. Care should be taken with using the carry flag as a 9th bit, as the carry flag is set by many different instructions and could be overwritten easily.

The authors of 6(http://codebase64.org/doku.php?id=base:6502_registers) claim that the carry flag is used in all four kinds of bit rotations. Once more sources 5(http://www.obelisk.me.uk/6502/registers.html) and 6(http://codebase64.org/doku.php?id=base:6502_registers) appear to contradict as 5(http://www.obelisk.me.uk/6502/registers.html) has no mention of the carry flags importance when it comes to bit rotations. However, the opcodes in 7(http://www.6502.org/tutorials/6502opcodes.html) make reference to instructions that read the carry flag when performing bit shifts. For more information see the Multiplication page on this wiki, section Bit Shifting, sub-section 6502 Instructions. Note that not all bit shifting instructions use the value previously stored in the carry flag, although all instructions will overwrite that value.

Bit 1 Z ~ Zero Flag

The zero flag is set when the result of an arithmetic operation equals 0. This includes loading values into registers. If the X register were to be loaded with a value of 0 the Zero Flag will be set. If the last operation did not result in a value of 0 the flag will be cleared. The authors of 9(https://www.atarimagazines.com/compute/issue53/047_1_All_About_The_Status_Register.php) claim that the zero flag "is probably the most important of the flags" sources [6,5,8] do not attribute it any special importance.

Bit 2 I ~ Interrupt mask

The interrupt mask flag is set when the program executes the SEI instruction. If the bit is set, the computer will not honour program interrupts. To re-enable interrupts one must clear the flag using the CLI instruction[9, 5]

Bit 3 D ~ Decimal Flag

The decimal flag is used by the processor to determine what rules to obey during arithmetic addition and subtraction. If the flag is set it will use the Binary Coded Decimal (BCD) rules. This flag can be set with the SED instruction and reset with the CLD[5].

While some authors suggest that the flag is easy to use and understand10(http://www.6502.org/tutorials/decimal_mode.html), the authors of both [6,9] warn against the potential risks using it may have. For example, when accidentally left on it can cause some strange arithmetic bugs.

Bit 4 B ~ Break Flag

When referring to the B flag it is important to bear in mind that the CPU's status register does not actually contain a B flag bit. The B flag only exists in the status flag byte that is pushed onto the processor stack [4].

There are four instructions which can be used to change the value of the B flag: NMI (non-maskable interrupt [2]), IRQ (Interrupt request [3]), BRK, PHP. The first two are software instructions and push the B flag to be 1. The second two are hardware interrupts and push the B flag to 0.

Bit 5 ~ Not In Use

This flag is not in use, cannot be accessed by the programmer and is always set to 1.

Bit 6 V ~ Overflow Flag

Sources [5,9] both mention and specify the importance of the overflow flag when dealing with 2's complement arithmetic. More specifically, the overflow flag is set when an arithmetic operation has produced an invalid 2's complement[9]. In other words when an arithmetic operation yields a result too large to be represented in a byte, the overflow flag is set. The authors of [6] state that "A common misbelief is that the V flag could only be set by arithmetic operations, not cleared." but they do not specify what they mean by this. One could imply that there is an opcode that will reset the overflow flag. Or they could mean that an instruction could be executed that will never overflow thus resetting it.

Bit 7 N ~ Negative Flag

The negative set everytime an arithmetic operation is performed. Whenever register A, X, Y is loaded with a value, the negative flag will be set with the topmost bit of the register being set (bit-7)6(http://codebase64.org/doku.php?id=base:6502_registers). The official NesDev wiki claims that the flag is set as a result of an operation is negative and the flag is cleared if positive 8(http://nesdev.com/6502.txt). While the definitions are on the surface the same the authors of 6(http://codebase64.org/doku.php?id=base:6502_registers) make clear that just loading values into the register will cause the flag to be reset with the latest sign, reducing potential confusing the definition provided by 8(http://nesdev.com/6502.txt) may cause.