Nvidia Drive PX2 Hardware - AD-EYE/AD-EYE_Core GitHub Wiki
NVIDIA Drive PX2
There are two releases of the Drive PX2 (DPX2). We posess the DPX2 AutoChauffeur (P2379) version. Hardware Connectors NVIDIA DRIVE PX 2 Archive DriveWorks SDK Reference Documentation Tegra-AURIX Communication on DRIVE PX 2
General Specification
Computing:
2 Tegra X2 SoCs
2 Pascal GPUs
CPU (Tegra X2):
2 x 4 ARM Cortex A57 cores
2 x 2 Denver cores
GPU:
2 x Parker GPGPU (Tegra X2)
2 x dGPU (descrete GPU)
Memory:
6.3 GB
Storage:
43.2 GB
Connectors:
An overview of the available connectors together with information on how to connect utilities can be found here.
Other information regarding the Drive PX2 platform can be found here.
AURIX Microcontroller
The NVIDIA DRIVE™ PX 2 open AI car computing platform integrates with Elektrobit AUTOSAR 4.x-compliant EB tresos software, which runs on the NVIDIA® Tegra® processor and the AURIX 32-bit TriCore Infineon microcontroller.
Tegra X2 (Parker series)
The board has two Tegra X2 (Parker) System on Chips (SoCs). Each SoC has a coherent multicore processor that has 2 NVIDIA Denver 2 ARM cores and 4 ARM Cortex-A57 cores. The Denver 2 cores each have 128KB Instruction and 64KB Data level 1 cache and 2MB shared level 2 unified cache.
On each SoC is also a GPU implemented which is built on NVIDIA's Pascal architecture. The GPU has 256 CUDA cores and supports all the same features as discrete NVIDIA GPUs.
The SoCs also as other peripherals such as Audio Processing Engine (APE), Always-On Sensor Processing (AON/SPE), Video Decoder and Encoder, Boot and Power Management Processor (BPMP), Safty and Camera Engine (SCE) and more. A functional block diagram and more detailed information could be found in the Technical Reference Manual for the Parker series.
Graphical Processing Units
There are 4 GPUs present on the platform. One in each Tegra X2 SoC and two discrete GPUs both built on NVIDIAs Pascal architecture.
Useful information could be retrieved by running deviceQuery with the following commands in the terminal:
sudo cd /usr/local/cuda/samples/1_Utilities/deviceQuery # go to the folder where src code is
sudo make # compile script
sudo ./deviceQuery # run it
The table below summarizes some of the parameters generated by deviceQuery:
| Parameter | Discrete GPU | Integrated GPU (Tegra X2) |
|---|---|---|
| Total amount of global memory | 3840 MBytes | 6402 MBytes (Shared with CPU) |
| Multiprocessors (MP) | 9 | 2 |
| CUDA Cores/MP | 128 | 128 |
| CUDA Cores (total) | 1152 | 256 |
| GPU Max Clock rate | 1290 MHz (1.29 GHz) | 1275 MHz (1.27 GHz) |
| Memory Clock rate | 3003 Mhz | 1600 Mhz |
| Memory Bus Width | 128-bit | 128-bit |
| L2 Cache Size | 1048576 bytes | 524288 bytes |
| Total amount of constant memory | 65536 bytes | 65536 bytes |
| Total amount of shared memory per block: | 49152 bytes | 49152 bytes |
| Total number of registers available per block | 65536 | 32768 |
| Warp size | 32 | 32 |
| Maximum number of threads per multiprocessor | 2048 | 2048 |
| Maximum number of threads per block | 1024 | 1024 |
The full result is stated below:
CUDA Device Query (Runtime API) version (CUDART static linking)
Detected 2 CUDA Capable device(s)
Device 0: "DRIVE PX 2 AutoChauffeur"
CUDA Driver Version / Runtime Version 9.2 / 9.2
CUDA Capability Major/Minor version number: 6.1
Total amount of global memory: 3840 MBytes (4026466304 bytes)
( 9) Multiprocessors, (128) CUDA Cores/MP: 1152 CUDA Cores
GPU Max Clock rate: 1290 MHz (1.29 GHz)
Memory Clock rate: 3003 Mhz
Memory Bus Width: 128-bit
L2 Cache Size: 1048576 bytes
Maximum Texture Dimension Size (x,y,z) 1D=(131072), 2D=(131072, 65536), 3D=(16384, 16384, 16384)
Maximum Layered 1D Texture Size, (num) layers 1D=(32768), 2048 layers
Maximum Layered 2D Texture Size, (num) layers 2D=(32768, 32768), 2048 layers
Total amount of constant memory: 65536 bytes
Total amount of shared memory per block: 49152 bytes
Total number of registers available per block: 65536
Warp size: 32
Maximum number of threads per multiprocessor: 2048
Maximum number of threads per block: 1024
Max dimension size of a thread block (x,y,z): (1024, 1024, 64)
Max dimension size of a grid size (x,y,z): (2147483647, 65535, 65535)
Maximum memory pitch: 2147483647 bytes
Texture alignment: 512 bytes
Concurrent copy and kernel execution: Yes with 2 copy engine(s)
Run time limit on kernels: No
Integrated GPU sharing Host Memory: No
Support host page-locked memory mapping: Yes
Alignment requirement for Surfaces: Yes
Device has ECC support: Disabled
Device supports Unified Addressing (UVA): Yes
Device supports Compute Preemption: Yes
Supports Cooperative Kernel Launch: Yes
Supports MultiDevice Co-op Kernel Launch: Yes
Device PCI Domain ID / Bus ID / location ID: 0 / 4 / 0
Compute Mode:
< Default (multiple host threads can use ::cudaSetDevice() with device simultaneously) >
Device 1: "NVIDIA Tegra X2"
CUDA Driver Version / Runtime Version 9.2 / 9.2
CUDA Capability Major/Minor version number: 6.2
Total amount of global memory: 6402 MBytes (6712545280 bytes)
( 2) Multiprocessors, (128) CUDA Cores/MP: 256 CUDA Cores
GPU Max Clock rate: 1275 MHz (1.27 GHz)
Memory Clock rate: 1600 Mhz
Memory Bus Width: 128-bit
L2 Cache Size: 524288 bytes
Maximum Texture Dimension Size (x,y,z) 1D=(131072), 2D=(131072, 65536), 3D=(16384, 16384, 16384)
Maximum Layered 1D Texture Size, (num) layers 1D=(32768), 2048 layers
Maximum Layered 2D Texture Size, (num) layers 2D=(32768, 32768), 2048 layers
Total amount of constant memory: 65536 bytes
Total amount of shared memory per block: 49152 bytes
Total number of registers available per block: 32768
Warp size: 32
Maximum number of threads per multiprocessor: 2048
Maximum number of threads per block: 1024
Max dimension size of a thread block (x,y,z): (1024, 1024, 64)
Max dimension size of a grid size (x,y,z): (2147483647, 65535, 65535)
Maximum memory pitch: 2147483647 bytes
Texture alignment: 512 bytes
Concurrent copy and kernel execution: Yes with 1 copy engine(s)
Run time limit on kernels: No
Integrated GPU sharing Host Memory: Yes
Support host page-locked memory mapping: Yes
Alignment requirement for Surfaces: Yes
Device has ECC support: Disabled
Device supports Unified Addressing (UVA): Yes
Device supports Compute Preemption: Yes
Supports Cooperative Kernel Launch: Yes
Supports MultiDevice Co-op Kernel Launch: Yes
Device PCI Domain ID / Bus ID / location ID: 0 / 0 / 0
Compute Mode:
< Default (multiple host threads can use ::cudaSetDevice() with device simultaneously) >
> Peer access from DRIVE PX 2 AutoChauffeur (GPU0) -> NVIDIA Tegra X2 (GPU1) : No
> Peer access from NVIDIA Tegra X2 (GPU1) -> DRIVE PX 2 AutoChauffeur (GPU0) : No
deviceQuery, CUDA Driver = CUDART, CUDA Driver Version = 9.2, CUDA Runtime Version = 9.2, NumDevs = 2
Result = PASS