• Thinking Methodically about Performance

• https://danluu.com/perf-tracing/

Roofline Performance Model

• https://crd.lbl.gov/departments/computer-science/par/research/roofline/introduction/

• https://github.com/cyanguwa/nersc-roofline

• https://en.wikipedia.org/wiki/Roofline_model

• Roofline Performance Model

• Applying the Roofline Model

• https://github.com/GeorgOfenbeck/perfplot

• 让深度学习更高效运行的两个视角 | Paper Reading第二季第一期

• Roofline Model与深度学习模型的性能分析

• https://github.com/ARM-software/SCALE-Sim

• https://www.cs.colostate.edu/~cs575dl/Sp2013/schedule.html

• [一周一paper][ISCA] In-Datacenter Performance Analysis of a Tensor Processing Unit​

• 论做AI芯片的正确姿势

• Accelerating HPC Applications with NVIDIA Nsight Compute Roofline Analysis

• Understanding Roofline Charts

Profiling

• https://en.wikipedia.org/wiki/Profiling_(computer_programming)

• gprof, Valgrind and gperftools - an evaluation of some tools for application level CPU profiling on Linux

• https://github.com/sdasgup3/cpuProfilingDemo

• https://www.jetbrains.com/help/profiler/Profiling_Guidelines__Choosing_the_Right_Profiling_Mode.html

• Analyzing and profiling multi-threaded application

• How can I profile C++ code running on Linux?

• How I profile multithreading problems?

• How to profile OpenMP bottlenecks

• https://github.com/Erdk/introtoprofiling

Profilers

• https://software.intel.com/content/www/us/en/develop/articles/intel-performance-counter-monitor.html

• https://github.com/andikleen/pmu-tools

• SSE loop to walk likely primes

• https://www.vi-hps.org/projects/score-p/

• http://www.cs.uoregon.edu/research/tau/home.php

• https://vampir.eu/

• http://www.bitmover.com/lmbench/

• profiling 与性能优化总结

Latency

• Everything You Know About Latency Is Wrong
• Why Averages Suck and Percentiles are Great
• Who moved my 99th percentile latency?
• https://stackoverflow.com/questions/12808934/what-is-p99-latency

Clock Cycle

• How to count clock cycles with RDTSC in GCC x86? [duplicate]
• Get CPU cycle count?

TMA (Top-down Microarchitecture Analysis) Method

• https://github.com/andikleen/pmu-tools/wiki/toplev-manual

• pmu-tools, part II: toplev

• Understanding How General Exploration Works in Intel® VTune™ Amplifier

• Intel CPU 上使用 pmu-tools 进行 TopDown 分析

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• Top-Down performance analysis methodology.

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• 让CPU黑盒不再黑——【TMA_自顶向下的CPU架构性能瓶颈分析方法】（一）What & Why

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• 让CPU黑盒不再黑——【TMA_自顶向下的CPU架构性能瓶颈分析方法】（二）How

• • Pipeline Slots
• • 对于CPU中的前端和后端划分，一般将micro-op Queue往后的部分划分为后端，micro-op Queue模块及其之前的部分为前端。micro-op Queue模块往后的带宽，便是CPU的发射宽度。
• • https://wiki.osdev.org/X86-64_Instruction_Encoding

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• 让CPU黑盒不再黑——【TMA_自顶向下的CPU架构性能瓶颈分析方法】（三）Frontend

• • Frontend Latency
    1. ICache Misses
    2. ITLB Misses
    3. Branch Resteers
    4. DSB Switches
    5. LCP
    6. MS Switches
• • Decoded Stream Buffer (DSB)：存放已经被decode的uops
• • Length Changing Prefixes (LCP)
• • • Does a Length-Changing Prefix (LCP) incur a stall on a simple x86_64 instruction?
• • Microcode Sequencer (MS)
• • Frontend Bandwidth
    1. Micro-instruction Translation Engine (MITE)
    2. Decoded Stream Buffer (DSB)
    3. Loop Stream Detector (LSD)

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• 让CPU黑盒不再黑——【TMA_自顶向下的CPU架构性能瓶颈分析方法】（四）Speculation

1. Branch Mispredicts
2. Machine Clears: e.g. memory ordering violations, self-modifying code, load illegal address ranges

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• 让CPU黑盒不再黑——【TMA_自顶向下的CPU架构性能瓶颈分析方法】（五）Retiring

• • What does Intel mean by "retired"?
• • 现代x86 CPU内部会将CISC指令转换成RISC指令来执行，变成一条条uops，但是有些复杂的CISC指令，并不会通过Frontend中的Decoder来得到相应的uops，而是通过Microcode Sequencer (MS) unit来生成相应的uops指令。

1. Base
2. Microcode Sequencer：MS用于解析默认decoders不支持的CISC指令，比如对string重复执行move操作的指令，CPUID指令等，这些类型的指令均由MS生成。