Logic Simplification: Karnaugh Maps (K-Maps)

"Gray Code": only a single bit (variable) changes from one code word and the next code word

Timing

Combinational Circuit Timing

• Contamination delay (t_cd): delay until the output starts changing. minimum possible delay

• Propagation delay (t_pd): delay until the output finishes changing. maximum possible delay

• Longest (Critical) & Shortest Delay Paths

Output Glitches

one input transition causes multiple output transitions

Fixing glitches is undesirable:

• More chip area
• More power consumption
• More design effort

The circuit is eventually guaranteed to converge to the right value regardless of glitchiness

Sequential Circuit Timing

D Flip-Flop Input Timing Constraints

• Setup time (t_setup): time before the clock edge that data must be stable (i.e. not changing)
• Hold time (t_hold): time after the clock edge that data must be stable
• Aperture time (t_a): time around clock edge that datamust be stable (t_a = t_setup + t_hold)

Flip-Flop Output Timing

• Contamination delay clock-to-q (tccq): earliest time after the clock edge that Q starts to change (i.e., is unstable)
• Propagation delay clock-to-q (t_pcq): latest time after the clock edge that Q stops changing (i.e., is stable)

Clock Skew