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Welcome to the MaRCoS wiki. The MAgnetic Resonance COntrol System (MaRCoS) is a suite of hardware and software that turns the Red Pitaya SDRlab 122-16 into an open-source MRI console. If you are interested in setting up MaRCoS or learning more, this wiki is for you!
Please see the MaRCoS MRI organisation page for a short overview, publications and other details - over time the contents of this wiki will be moved to the organisation pages.
These aim to walk you through the basics of the MaRCoS system.
Set up MaRCoS software libraries, and run the main unit tests (no hardware required!)
Write and simulate a simple MaRCoS sequence (no hardware required!)
Set up a MIMO system and run some tests
These will help you complete specific tasks.
Debugging the MaRCoS software environment
Halting a running MaRCoS experiment
Using independent TX and RX frequencies
[Under development] Setting up a MIMO system using multiple SDRLabs
[Slightly out-of-date] Setting MaRCoS up
[TODO] Using MaRCoS (For now, see the tutorials above)
[Slightly out-of-date] Setting MaRCoS up
[TODO] Using MaRCoS (For now, see the tutorials above)
Gradient DACs, includes MaRCoS pinout diagram
Delve into these to find information not included in the wiki.
MaRCoS server, the C++ application running on the SDRlab managing the hardware.
MaRCoS client a set of Python scripts to test and control the MaRCoS system, and simulate the hardware.
MaRCoS FPGA bitstream, a Vivado Tcl-based workflow to compile the MaRCoS bitstream. Works for the RP-122, partially works for the RP-125 but needs testing and fixes to the memory map [as of 02/2025 - please contact Vlad if more info is desired]. Follows the approach of Pavel Demin and uses/adapts some of his utility scripts.
meta-openmri, a Yocto layer and guide to build the SD card image. Set up by Danny Park. Note that the standard Red Pitaya image can also be used.
MaRGA repo, containing the HDL, simulation model and utilities for the FPGA firmware – useful for MaRCoS developers.
marcos-pack repo, containing everything a typical user needs to quickly get started (see Setting MaRCoS up for a step-by-step guide)
MaRCoS is a fork of Thomas Witzel’s open-source MRI platform, OCRA and owes a lot to its design. It has significantly diverged and no longer shares any code, however the hardware and concepts are very similar.
There are a few papers related to MaRCoS and its applications so far:
MaRCoS, an open-source electronic control system for low-field MRI, a technical discussion of MaRCoS, its architecture and its hardware and software components (arXiv preprint here). Please see it for more technical detail.
Benchmarking the performance of a low-cost magnetic resonance control system at multiple sites in the open MaRCoS community, a discussion of how the MaRCoS system works, who is using it and how.
Portable magnetic resonance imaging of patients indoors, outdoors and at home, about a portable clinical low-field MRI scanner that uses MaRCoS for its electronic control.
The MaRCoS hardware consists of a Red Pitaya SDRlab and a custom gradient DAC PCB, plus the amplifiers, coils etc that make up a simple MRI setup.
MaRCoS runs on the SDRlab 122-16 SDR board, which was chosen over the STEMlab 125-14 due to its larger Zynq FPGA chip and 16-bit AC-coupled ADCs. If there is demand, it could easily be ported to the STEMlab, at the cost of some RX FIFO depth.
There is not yet a standard gradient DAC PCB in the MaRCoS community, and MaRCoS supports both Marcus Prier’s OCRA1 and Benjamin Menkuec’s GPA-FHDO. See the gradient DAC page for info.
The MaRCoS FPGA firmware, MaRGA, controls two AC-coupled RF ADC inputs for sampling MRI signals, two AC-coupled RF DAC outputs to generate RF to drive the MRI coils, and a range of digital inputs and outputs for triggering and controlling external devices including the gradient DAC channels. The RF ADC and DAC run at 122.88 MHz on the SDRlab 122. The following is a brief overview; for more detail please see our paper describing the MaRCoS architecture.
The core of MaRGA is a bank of parallel timed buffers, which can execute arbitrary outputs with arbitrary cycle-accurate timing. These are used to drive all of MaRGA’s peripherals including the RF DAC numerically-controlled oscillators, I/Q envelopes and gradient DACs. The Python-based MaRCoS compiler can take Numpy arrays or CSV data and convert it into MaRGA instructions, which are fed to MaRGA by the MaRCoS server.
The RX and TX chains can either share a numerically-controlled oscillator (NCO), or use independent NCOs to downconvert/upconvert data. The frequency and phase of the NCOs can be adjusted independently from the I/Q envelope data, allowing for more frequency agility than just modulating the envelope.
The TX chain takes a stream of I/Q samples, each sample timed independently, and multiplies (upconverts) these by an NCO tone to create a stream of output samples to the DAC.
The RX chain operates in reverse: it receives a stream of ADC samples, multiplies (downconverts) them by an NCO tone, then filters the resultant I/Q samples through a pair of adjustable-rate CICs. The results are read by the MaRCoS server and sent back to the PC.
The two supported gradient DAC boards both operate through SPI, with different protocols and pinouts. Each DAC sample is serialised and sent through dedicated digital pins to the DAC boards. While the SPI update rate is limited by the DACs and the signal integrity through the connecting cables, the timing precision of each update is down to one cycle of the 122.88 MHz clock, like the TX signal. This allows for precise timing adjustment and latency compensation when required.
This was just a brief overview of the MaRGA design. If you wish to investigate and customise the FPGA firmware, you will need to become familiar with Xilinx Vivado and the general FPGA development toolchain. The MaRGA HDL project structure is based largely on the approach followed by Pavel Demin, in particular that in the Red Pitaya notes and STEMlab SDR notes repos. Note that some parts of these repos are obsolete or no longer relevant; use them as a guide only.
The MaRCoS hardware can be controlled using the MaRCoS client. This can be used to compose sequences for the hardware, and returns arrays of ADC data for reconstruction by the user. For more information, have a look at the tutorials.