Hardware registers - v3l0c1r4pt0r/lkv-wiki GitHub Wiki
MMP (0xC0000000)
DPU (0xD0900000)
SMAZ Decoder (+0x300)
Address | Name | R/W | Description |
---|---|---|---|
+0x00 |
CTRL |
RW | Control Register - write 0x22 to begin SMAZ decode. |
+0x08 |
SRC_ADDR |
RW | Source Address of SMAZ compressed data. |
+0x0C |
DST_ADDR |
RW | Destination Address for decompressed data. |
+0x10 |
SRC_LEN |
RW | Length of source data in bytes. |
+0x14 |
DST_LEN |
RW | Length of decompressed data in bytes. |
+0x1C |
STAT |
R | 0x20084000 before decoding, 0x2007400A during decoding, 0x2078000A after decoding |
GPIO (0xDE000000)
SSP0/1 (0xDE800000)
SSP | Base Address |
---|---|
SSP0 | 0xDE800000 |
SSP1 | 0xDE900000 |
Address | Name | R/W | Description |
---|---|---|---|
+0x0C |
DATA |
RW | Write to begin SPI transfer. |
+0x18 |
STAT |
R | Status of SPI transfer. |