SMT Power Delivery Investigations - t-shaw374/209_group7_2026 GitHub Wiki

SMT POWER DELIVERY INVESTIGATIONS

-Thomas Shaw

Overview

Purpose: Power the MCU, displays, signal conditioning circuitry, and wireless module from an AC source.

  • Input: 12.6–15.4 Vrms, 50Hz AC
  • Output: stable 5V and 3.3V rails

Peak Current Demand Estimates

5V Rail

Component Typical Peak
ATmega328PB 12 mA 20 mA
Op-amp ×3 5 mA 6 mA
ESP32 (BLE burst) 15 mA 300 mA
I2C OLED 25 mA 25 mA
7-seg display (Δ digit) 15 mA 125 mA
  • Will not be sending over BLE and updating the screen at the same time
  • ESP32 will be asleep for the vast majority of the time
  • 7-seg brightness controlled by OE pin

Maximum current burst (all at peak, non-overlapping BLE/7-seg spikes excluded): 20 + 6 + 300 + 25 + 15 = ~366 mA

Usual current draw: ~72 mA

3.3V Rail

Function Current
AVREF ~0 A
Op-amp offset ~0 A

Want to keep 3.3V as stable as possible, since it will directly affect measurements.

Initial: Linear regulators only

One regulator for 5V, one for 3.3V rail.

Issue: Linear regulators drop voltage by dissipating power as heat.

Power Calculations

  • Assume 0.7V forward voltage drop across the diode in a half-wave rectifier
  • Assume worst case for power drop → 0V ripple
Min Vin = 12.6 × 1.414 − 0.7 = 17.1V
Max Vin = 15.4 × 1.414 − 0.7 = 21.1V
Scenario V_in V_out ΔV I_out P_loss
Typical draw 17.1 V 5 V 12.1 V 72 mA 0.87 W
Typical draw 21.1 V 5 V 16.1 V 72 mA 1.16 W
Max draw 17.1 V 5 V 12.1 V 366 mA 4.43 W
Max draw 21.1 V 5 V 16.1 V 366 mA 5.89 W

Will likely get quite hot. Although it only burns 6W for very brief periods, it might be fine with a heatsink.

Efficiency:

Scenario V_in I_out P_out P_loss P_in Efficiency
Typical, low Vin 17.1V 72 mA 0.36 W 0.87 W 1.23 W 29.3%
Typical, high Vin 21.1V 72 mA 0.36 W 1.16 W 1.52 W 23.7%
Max, low Vin 17.1V 366 mA 1.83 W 4.43 W 6.26 W 29.2%
Max, high Vin 21.1V 366 mA 1.83 W 5.89 W 7.72 W 23.7%

Very inefficient.

Voltage Sag

Dropping ~16V at 366mA could cause voltage dips on the rail. This is fine for measurements, since data will be sent at a different point in the cycle. However, this may cause the ATmega or ESP32 to reset or corrupt data that needs to be sent.

Conclusion

A linear regulator only reaches ~24–29% efficiency here, dissipating most of the input power as heat and requiring a heatsink for the resulting ~1–6W. Consider a buck converter.

Buck converter + voltage divider

Next, we considered using a buck converter to handle most of the heavy lifting to reach 5V, then using a voltage divider to get the 3.3V rail.

Efficiency

This would be the biggest advantage for the buck converter over the linear regulator.

From datasheet:

Our input voltage of 17->21V sits around 82% at 3A load. Testing this on breadboard with 2x130ohm at 77mA (P_each ≈ 0.19W) (representing typical load):

And 10x130ohm at 385mA (P_each ≈ 0.19W) (representing worst case):

Ripple

Linear regulators are much better at smoothing out the input ripple compared to buck converters Buck converter output:

Buck converter + linear regulator

What if we combined the buck converter's efficiency with the linear regulator's ripple removal? Step down the rectified input to slightly above the linear regulators required Vin for 5V out, then use the smooth output of the linear regulator.

Here, we can see a much smoother response from the buck alone, as shown above.

Extra changes

Adding a bulk capacitor right before the 5V pin on the ESP32 should help with the high current draw pulling down the 5V rail. Keeping the 3.3V line separate should help with any dips on the 5V line, not affecting Aref and offset voltage.

Conclusion

We have decided to use a half rectifier followed by a buck converter down to 7V (required for 5V out of the linear reg). Into 2 linear regulators, one for 5V and one for 3.3V.