Gain selection and signal conditioning values - t-shaw374/209_group7_2026 GitHub Wiki
GAIN SELECTION AND SIGNAL CONDITIONING VALUES
-Thomas Shaw
Overview
Purpose: Scale the sensed load voltage and load current into a range the ATmega328PB ADC can read accurately, with headroom for tolerances and noise.
- Input: 12.6–15.4 Vrms, 500 Hz ± 2% AC source, 2.5–7.5 VA load
- Output: two AC signals centred on 1.65 V, kept within 0.25–3.05 V
- ADC reference: 3.3 V AREF → 3.22 mV per LSB
- Op-amp: TLC082 (dual), single 5 V supply
Test Cases
Inductance fixed at L = 4 mH to test extreme values. R is chosen so the load reaches the VA limit. All cases at 500 Hz, so X_L = 2π·500·0.004 = 12.57 Ω.
|Z| = V² / S
R = √(|Z|² − X_L²)
PF = R / |Z|
I_pk = √2 · V / |Z|
| Case | V_rms | S | |Z| | R | PF | I_rms | I_pk | P |
|---|---|---|---|---|---|---|---|---|
| 1 | 12.6 V | 7.5 VA | 21.17 Ω | 17.03 Ω | 0.805 | 595.2 mA | 841.8 mA | 6.04 W |
| 2 | 15.4 V | 7.5 VA | 31.62 Ω | 29.02 Ω | 0.918 | 487.0 mA | 688.7 mA | 6.88 W |
| 3 | 15.4 V | 2.5 VA | 94.86 Ω | 94.03 Ω | 0.991 | 162.3 mA | 229.6 mA | 2.48 W |
| 4 | 12.6 V | 2.5 VA | 63.50 Ω | 62.25 Ω | 0.980 | 198.4 mA | 280.6 mA | 2.45 W |
- Case 1 → highest current, lowest PF
- Case 3 → lowest current, highest PF
- With L fixed at 4 mH, PF cannot go below ~0.80 inside 2.5–7.5 VA. Hitting the 0.6 PF spec corner at 7.5 VA would need ~5.4–8.1 mH.
ADC Window: 0.25 V to 3.05 V
A 0.25 V safety net is left on either side of the 0–3.3 V ADC range.
Low side (0.25 V): limited by the op-amp
The TLC082 is not rail-to-rail on its output. From the datasheet at VDD = 5 V:
| Parameter | Condition | Value |
|---|---|---|
| V_OL | I_OL = 1 mA, 25 °C, typ | 0.18 V |
| V_OL | I_OL = 1 mA, 25 °C, max | 0.25 V |
| V_OL | I_OL = 1 mA, full temp range, max | 0.35 V |
- The output is only guaranteed to pull down to 0.25 V, so anything lower would clip.
- The ADC input draws almost no current, so the real V_OL sits closer to 0.18 V and gives some margin.
High side (3.05 V): limited by AREF
| Parameter | Condition | Value |
|---|---|---|
| V_OH | I_OH = −1 mA, 25 °C | ~4.1–4.3 V |
| V_OH | I_OH = −1 mA, full temp range, min | 3.9 V |
- The op-amp can swing well past 3.3 V, so the ADC saturates first (code 1023).
- The 0.25 V margin below AREF absorbs:
- AREF tolerance
- resistor tolerance
- op-amp offset × gain (V_IO ≤ 1.9 mV)
- noise and harmonics
Resolution
Centre = 3.3 / 2 = 1.65 V
Swing = ±1.40 V
Span = 3.05 − 0.25 = 2.8 V
Codes = 2.8 / 3.22 mV ≈ 869 of 1024 (85%)
Margin = 0.25 V ≈ 78 LSB each side
Current Sensing
Shunt: 2 × 1 Ω in parallel (R6 ∥ R7)
R_shunt = 1 ∥ 1 = 0.5 Ω
P_total = I_rms² × 0.5
P_each = (I_rms / 2)² × 1
| Case | I_rms | V_is,pk | P_total | P per resistor | Peak inst. per resistor |
|---|---|---|---|---|---|
| 1 | 595.2 mA | 0.421 V | 177.1 mW | 88.6 mW | 177 mW |
| 2 | 487.0 mA | 0.344 V | 118.6 mW | 59.3 mW | 119 mW |
| 3 | 162.3 mA | 0.115 V | 13.2 mW | 6.6 mW | 13 mW |
| 4 | 198.4 mA | 0.140 V | 19.7 mW | 9.8 mW | 20 mW |
- Worst case is 88.6 mW per resistor, which is about 35% of a 0.25 W rating. This keeps within the usual 50% derating.
- A single 0.5 Ω resistor would dissipate 177 mW, about 71% of rating, which is why the shunt is split.
- The shunt adds < 3% to load impedance, so its effect on load current is negligible.
Current amplifier (U4B)
Difference amplifier with matched ratios:
| Ref | Value | Role |
|---|---|---|
| R9 | 10 kΩ | Inverting input (to GND) |
| R11 | 33 kΩ | Feedback |
| R10 | 10 kΩ | Non-inverting input (from V_is) |
| R12 | 33 kΩ | To 1.65 V reference |
R11 / R9 = R12 / R10 = 3.3
V_im = 3.3 · V_is + 1.65 V
Gain choice:
- Worst case V_is,pk = 0.421 V (case 1) → 3.3 × 0.421 = 1.389 V, just under the ±1.40 V budget.
- Required transimpedance ≈ 1.40 / 0.8418 ≈ 1.66 V/A. Design gives 0.5 Ω × 3.3 = 1.65 V/A.
| Case | V_im range | Amplitude |
|---|---|---|
| 1 | 0.29 – 3.01 V | 1.363 V |
| 2 | 0.53 – 2.77 V | 1.120 V |
| 3 | 1.27 – 2.03 V | 0.377 V |
| 4 | 1.19 – 2.11 V | 0.459 V |
- The low-current cases only use about 27% of the range: ~237 codes peak-to-peak, ~0.6 mA_pk per code.
- This is still well within the ±5% full-scale accuracy spec.
Voltage Sensing
Divider (R4, R8)
| Ref | Value |
|---|---|
| R4 | 270 kΩ |
| R8 | 15 kΩ |
k = R8 / (R4 + R8) = 15 / 285 = 0.05263
- High resistance keeps divider current low (~54 µA at 15.4 V), so it has negligible effect on the load.
Thevenin equivalent of divider
Seen from V_vs, the divider acts as a source with internal resistance:
R_th = R4 ∥ R8 = 270k ∥ 15k = 14.21 kΩ
V_th = V_is + k · (V_ac − V_is)
R_th sits in series with R22, so the non-inverting input sees:
R22 + R_th = 68k + 14.21k = 82.21 kΩ ≈ R20 (82 kΩ)
This is why R22 = 68 kΩ rather than 82 kΩ. Using 82 kΩ would give ~96 kΩ effective and unbalance the amplifier.
Voltage amplifier (U5B)
| Ref | Value | Role |
|---|---|---|
| R20 | 82 kΩ | Inverting input (from V_is) |
| R19 | 100 kΩ | Feedback |
| R22 | 68 kΩ (+14.21 kΩ R_th) | Non-inverting input (from V_vs) |
| R23 | 100 kΩ | To 1.65 V reference |
G = R19 / R20 = 100 / 82 = 1.2195
V_vm ≈ G · k · (V_ac − V_is) + 1.65
≈ 0.0641 · V_load + 1.65 V
Gain choice:
- Worst case V_pk = 15.4 × √2 = 21.78 V.
- Required gain = 1.40 / 21.78 = 0.0643. Design gives 0.0641.
- The differential input (V_vs − V_is) cancels the shunt voltage, so V_vm tracks the voltage across the load only.
| Case | V_vm range | Amplitude |
|---|---|---|
| 1 | 0.53 – 2.77 V | 1.121 V |
| 2 | 0.28 – 3.03 V | 1.376 V |
| 3 | 0.26 – 3.04 V | 1.389 V |
| 4 | 0.52 – 2.79 V | 1.133 V |
Difference Amplifier Mismatch
Nominal mismatch
Inverting ratio R20 / R19 = 0.8200
Non-inverting ratio (R22 + R_th) / R23 = 0.8221
ε = +0.26%
| Effect | Value |
|---|---|
| Common-mode gain A_cm ≈ G·ε / (1 + G) | −0.0014 V/V |
| Differential gain A_d | 1.219 V/V |
| CMRR | ≈ 59 dB |
| Error from V_is (0.421 V_pk) | ≈ 0.6 mV_pk (~0.05%) |
| DC offset | 1.652 V (+2.3 mV, ~0.7 LSB) |
The nominal mismatch is negligible.
Resistor tolerance
| Ratio mismatch ε | Cause | A_cm | V_is error (pk) | Offset shift |
|---|---|---|---|---|
| 0.26% | Nominal values | 0.0014 | 0.6 mV | 2.3 mV |
| 1% | 0.25–0.5% resistors | 0.0055 | 2.3 mV | 9 mV |
| 2% | 1% resistors, typical | 0.011 | 4.6 mV | 18 mV |
| 4% | 1% resistors, worst case | 0.022 | 9.3 mV | 36 mV |
- Even at 4%, the V_is leakage is ~0.7% of full scale, well within ±5% spec.
- The leaked term is in phase with current, not voltage, so it barely affects V_rms.
- **Firmware must subtract the measured