7V BUCK STAGE COMPONENT SELECTION

-Thomas Shaw

Overview

Purpose: Half-wave rectify the AC source, limit inrush current, store bulk energy, and step down to a regulated 7 V rail using an LM2596-ADJ buck converter.

• Input: 12.6–15.4 Vrms, 500 Hz AC
• Output: 7 V DC (feeds the 5 V and 3.3 V rails)
• Load estimate (from power delivery page): 72 mA typical, 366 mA peak on the downstream rails

Ref	Part	Value
CR1	1N4007 (was SS34)	Rectifier diode
R2, R3, R18	Resistors in parallel	6.8 Ω each (R_eq = 2.27 Ω), ≥ 0.5 W
C2, C32, C4	Electrolytic, 35 V	220 µF + 220 µF + 100 µF = 540 µF
C3	Ceramic	100 nF
D2	M7 (SMD 1N4007)	Reverse-polarity protection
U1	LM2596S-ADJ	Buck regulator, 150 kHz
R1, R5	Feedback divider	4.7 kΩ / 1 kΩ
C1	Ceramic C0G/X7R	2.2 nF feedforward
L1	Power inductor (marked "470")	47 µH
CR2	SS34	Schottky catch diode
C5	Electrolytic, ≥ 16 V	220 µF
C6	Ceramic	100 nF

Rectifier Stage

CR1: 1N4007 instead of SS34

In a half-wave rectifier with a reservoir capacitor, the diode sees the source's negative peak while the capacitor holds the positive peak:

V_R(max) = Vpk + Vc ≈ 2 × (15.4 × √2) = 2 × 21.78 = 43.6 V

Parameter	SS34	1N4007	Required
Reverse voltage V_RRM	40 V	1000 V	> 43.6 V
Average forward current	3 A	1 A	< 0.4 A
Surge current I_FSM	~80 A	30 A	> inrush peak
Forward voltage	~0.5 V	~0.9–1.1 V	—

• SS34 is under-rated: 43.6 V exceeds its 40 V reverse rating
• 1N4007 has huge reverse voltage margin (1000 V)
• Its slow reverse recovery doesn't matter at 500 Hz. It only matters at switching frequencies, such as the 150 kHz catch diode
• Its higher forward voltage costs about 0.5 V of headroom, which is acceptable (see below)

Current limiting resistors (R2 || R3 || R18)

Equivalent resistance

R_eq = 1 / (1/R2 + 1/R3 + 1/R18)
     = R / 3                (if all three are equal)

Splitting into three resistors shares the pulse power between them.

Step 1: Required DC input current

Convert the needed output current into the DC current drawn from the reservoir capacitor:

I_dc = (V_out × I_out) / (η × V_req)

• V_out = 7 V, η ≈ 0.8 (buck efficiency)
• V_req = minimum allowed reservoir voltage, used here so that I_dc is not underestimated
• LM2596 needs about V_out + V_SAT + margin:

V_req ≈ 7 + 1.16 + ~0.8 ≈ 9 V

Step 2: Ripple from the bulk capacitance

Half-wave: one recharge per source cycle (f = 500 Hz):

ΔV = I_dc / (f × C_bulk)

Step 3: Allowed voltage drop across the resistor

The resistor reduces how high the capacitor charges (V_top). The available drop is what remains after the diode, ripple and required minimum:

δ_max = Vpk,min − V_F − ΔV − V_req

Vpk,min = √2 × Vrms,min = √2 × 12.6 = 17.82 V

Step 4: Maximum R_eq

The capacitor only charges during a short window near the AC peak (conduction angle ±θc). Charge delivered per cycle must equal charge drawn by the load:

Charge balance:   (2 × Vpk × θc³) / (3 × R_eq × ω) = I_dc × T

→  θc = ( 3π × R_eq × I_dc / Vpk )^(1/3)
→  δ  = Vpk × (1 − cos θc) ≈ Vpk × θc² / 2

Setting δ = δ_max and solving for R_eq:

              Vpk           ( 2 × δ_max )^(3/2)
R_eq,max = ---------- ×  ( ----------- )
            3π × I_dc     (    Vpk    )

Any source resistance (transformer winding, wiring) counts towards R_eq:

R_eq + R_source ≤ R_eq,max

Step 5: Minimum R_eq (inrush)

Worst case: switched on at the AC peak with empty capacitors:

             Vpk,max − V_F
R_eq,min = ----------------
              I_surge

Vpk,max = √2 × 15.4 = 21.78 V
I_surge = 1N4007 I_FSM = 30 A (use ~15 A for 2× margin)

Step 6: Resistor power

The charging current is a parabolic pulse, with peak δ / R_eq. Total dissipation:

           2 × Vpk² × θc⁵
P_R,tot = ----------------
            15π × R_eq

P_each = P_R,tot / 3        (three equal resistors)

Worked example

Values: V_F = 1.0 V (1N4007), C_bulk = 540 µF, V_req = 9 V

Quantity	Peak load (366 mA)	Typical load (72 mA)
P_out = 7 × I_out	2.56 W	0.50 W
I_dc = P_out / (0.8 × 9)	0.356 A	0.069 A
ΔV = I_dc / (500 × 540µ)	1.32 V	0.26 V
δ_max = 17.82 − 1.0 − ΔV − 9	6.50 V	7.56 V
R_eq,max	3.31 Ω	21.3 Ω

R_eq,min = (21.78 − 1.0) / 15 = 1.39 Ω

Design range: 1.4 Ω ≤ R_eq ≤ 3.3 Ω (set by peak load)

Chosen: 3 × 6.8 Ω → R_eq = 2.27 Ω

Inrush (worst case) = (21.78 − 1.0) / 2.27 = 9.2 A   (< 30 A I_FSM)

θc = (3π × 2.27 × 0.356 / 17.82)^(1/3) = 0.754 rad
P_R,tot = 2 × 17.82² × 0.754⁵ / (15π × 2.27) ≈ 1.44 W   (worst case, sustained peak load)
P_each ≈ 0.48 W

• Peak load is a short burst (BLE transmit, display update), so average dissipation is much lower
• Typical-load dissipation is only ~40 mW
• Use resistors rated ≥ 0.5 W, or 1 W for extra margin
• The equation is conservative: it uses I_dc at the 9 V minimum and assumes the full cycle of discharge

Bulk capacitors (C2, C32, C4)

C_bulk = 220 + 220 + 100 = 540 µF

ΔV (typical) = 0.041 A / (500 × 540µ) ≈ 0.15 V
ΔV (peak)    = 0.25 A  / (500 × 540µ) ≈ 0.93 V

• Ripple is calculated at 500 Hz, not 50 Hz. The higher source frequency means a much smaller capacitance is needed than for mains
• Even at 12.6 V with peak load, the ripple trough stays well above the ~9 V the LM2596 needs for a 7 V output
• Voltage rating: LM2596 datasheet recommends ≈ 1.5 × V_in(max) for aluminium electrolytics → 1.5 × 21.8 ≈ 33 V → use 35 V rated caps
• Input capacitor at VIN (C4): the datasheet requires a low-ESR input capacitor placed close to the IC, rated for RMS current ≥ 0.5 × load current. It supplies the 150 kHz switching current pulses locally
• Reservoir caps at the rectifier: splitting the capacitance across several parts lowers total ESR and fits the available values/footprints

C3 (100 nF)

• Electrolytics have high ESR/ESL at high frequency
• The 100 nF ceramic bypasses high-frequency noise and switching spikes that the electrolytics can't absorb

D2: reverse-polarity protection

Part: M7 (SMD equivalent of 1N4007), SMA package

Parameter	Value
Reverse voltage V_RRM	1000 V
Average forward current	1 A
Surge current I_FSM	30 A
Forward voltage	~1.1 V

D2 is connected from VdcRaw (cathode) to GND (anode), so it is reverse-biased in normal operation.

Normal VdcRaw(max) = 15.4 × √2 = 21.8 V   <<   1000 V   → never conducts normally

Function

• If VdcRaw is driven negative, D2 becomes forward-biased and clamps the rail to about -1 V
• This protects:
  • the electrolytic capacitors (C2, C32, C4), which can fail if reverse-biased
  • the LM2596, which has no internal reverse-input protection
• It also clamps any negative spikes on VdcRaw

When it matters

• Reversing the AC input does nothing harmful, because CR1 already blocks negative half-cycles
• D2 matters when the buck stage is powered directly at VdcRaw, e.g. testing the regulator on a bench supply connected backwards
• In that case D2 shorts the reversed supply, and the bench supply's current limit handles the fault current

Not an overvoltage clamp

• D2 is a standard rectifier, not a TVS or Zener, so it gives no protection against overvoltage
• Input overvoltage protection relies on the LM2596's 40 V rating (45 V abs max), which gives margin over the 21.8 V maximum input

LM2596 Buck Converter

Key datasheet values

Parameter	Value
Feedback voltage V_REF	1.23 V (1.193–1.267 V at 25 °C)
Input voltage	4.5–40 V (45 V abs max)
Switching frequency	150 kHz
Switch saturation V_SAT	1.16 V typ
Current limit	4.5 A typ

ON/OFF pin

• Pin 5 tied to GND → regulator always on
• Active low: below ~1.3 V = on

Feedback resistors (R1, R5)

Datasheet equation (datasheet R1 = bottom resistor, R2 = top resistor):

V_OUT = V_REF × (1 + R_top / R_bottom)
R_top = R_bottom × (V_OUT / V_REF − 1)

Datasheet recommends R_bottom between 240 Ω and 1.5 kΩ. In this schematic, R5 is the bottom resistor and R1 is the top resistor.

R5 = 1 kΩ
R1 = 1k × (7 / 1.23 − 1) = 4.69 kΩ  ->  4.7 kΩ

V_OUT = 1.23 × (1 + 4.7k / 1k) = 7.01 V

• V_REF tolerance (1.193–1.267 V) gives V_OUT ≈ 6.80–7.22 V, which is fine for feeding linear regulators

Feedforward capacitor (C1)

Datasheet guidance

• The datasheet calls it the feedforward capacitor (C_FF), also the compensation capacitor
• Placement: in parallel with the top feedback resistor (datasheet R2 = schematic R1)
• Purpose: adds lead compensation to the feedback loop, increasing phase margin for better loop stability
• When required: output voltage above about 10 V, or very low-ESR output capacitors (e.g. solid tantalum). The datasheet also notes it adds stability at low input or output voltages
• Typical range: 100 pF to 33 nF
• Type: ceramic, plastic film or silver mica. Avoid Z5U ceramics, which are unstable

Is it needed at 7 V?

• V_OUT = 7 V is below the 10 V threshold, and C5 is an electrolytic (not very low ESR), so C1 is not strictly required
• It is still included because:
  • the datasheet's adjustable-output table lists C_FF values for low output voltages too
  • it improves phase margin, which helps in DCM at light load (47 µH inductor)
  • it costs one small capacitor, and the footprint can be left unpopulated if not needed

Value selection

Datasheet Table 9-6 (adjustable version):

V_OUT	C_FF
6 V	3.3 nF
9 V	1.5 nF
12 V	1 nF

Interpolating for 7 V gives about 2.2–3.3 nF. 2.2 nF is chosen (3.3 nF also acceptable).

The datasheet also gives an equation:

C_FF = 1 / (31 × 10³ × R_top)
     = 1 / (31 × 10³ × 4.7k)
     = 6.9 nF

This doesn't agree with the datasheet's own worked example (it gives ~2.1 nF where the example uses 560 pF), so the table values are used instead.

Zero and pole introduced

C1 across R1 adds a zero and a pole to the feedback divider:

f_zero = 1 / (2π × R1 × C1)
       = 1 / (2π × 4.7k × 2.2n)  = 15.4 kHz

f_pole = 1 / (2π × (R1 || R5) × C1)
       = 1 / (2π × 824 × 2.2n)   = 87.8 kHz

• Between these frequencies the feedback gain rises, giving the phase boost (lead) that improves stability
• Both are well below the 150 kHz switching frequency

C1	f_zero	f_pole
2.2 nF	15.4 kHz	87.8 kHz
3.3 nF	10.3 kHz	58.5 kHz

Inductor (L1)

Value: 47 µH (marking "470" = 47 × 10⁰ µH)

Datasheet volt-second product:

E×T = (V_IN − V_OUT − V_SAT) × (V_OUT + V_D) / (V_IN − V_SAT + V_D) × (1000 / 150)   [V·µs]
V_SAT = 1.16 V,  V_D = 0.5 V

V_IN	E×T	ΔI = E×T / L	CCM boundary (ΔI / 2)
16.8 V (12.6 Vrms)	26.8 V·µs	0.57 A	0.29 A
20.7 V (15.4 Vrms)	31.3 V·µs	0.67 A	0.33 A

Operating mode

• Typical load (~72 mA) is well below the 0.29–0.33 A boundary, so the converter runs in discontinuous conduction mode (DCM)
• At peak load (~366 mA) it is just into continuous mode
• The datasheet says DCM is acceptable for light loads (about 1 A and below), and that the inductor can be 1/2 to 1/3 of the continuous-mode value

Peak inductor current

In DCM:

I_pk = sqrt( 2 × I_out × V_out × (V_in − V_out) / (L × f × V_in) )

Load	Mode	I_pk
72 mA (typical)	DCM	≈ 0.31 A
366 mA (peak)	CCM boundary	≈ I_out + ΔI/2 ≈ 0.70 A

• Peak current is far below the inductor rating and the LM2596's 4.5 A current limit

Trade-offs of 47 µH

	47 µH	330 µH
Ripple current	0.57–0.67 A pp	~0.1 A pp
Mode at typical load	DCM	CCM
Output ripple	Higher	Lower
Size / DCR	Smaller, lower DCR	Larger, higher DCR

• Higher output ripple is acceptable because the 7 V rail feeds linear regulators, which reject it (PSRR) before the 5 V and 3.3 V rails
• Ringing at the switch node in DCM is normal, according to the datasheet. It can be damped with a series RC across the inductor if it causes noise
• Note: the schematic library part DR127-331-R (330 µH) does not match the fitted part and should be updated

Catch diode (CR2: SS34)

Requirement (datasheet)	Needed	SS34
Type	Schottky or ultra-fast (≤ 50 ns), not 1N400x	Schottky ✅
Reverse voltage ≥ 1.25 × V_IN(max)	≥ 27 V	40 V ✅
Current ≥ 1.3 × I_load(max)	≥ 0.5 A	3 A ✅

• This is why the SS34 is kept here: the catch diode switches at 150 kHz and needs fast recovery
• It only sees V_IN (not 2 × Vpk as in the rectifier), so 40 V is enough

Output capacitors (C5, C6)

• C5 = 220 µF: datasheet allows 82–820 µF electrolytic. Its 6–9 V table values (330–470 µF) are sized for loads up to 3 A. With a load under 0.4 A, 220 µF is adequate
• The 47 µH inductor gives higher ripple current, but the downstream linear regulators reject the resulting output ripple
• Voltage rating ≥ 1.5 × V_OUT = 10.5 V → use 16 V or higher
• ESR must not be too low, or the loop can become unstable. A standard low-ESR electrolytic suits this
• C6 = 100 nF ceramic: bypasses high-frequency switching noise on the 7 V rail

Summary

Component	Value	Reason
CR1	1N4007	Reverse voltage ~43.6 V exceeds SS34 rating
R2, R3, R18	3 × 6.8 Ω, ≥ 0.5 W	R_eq = 2.27 Ω: inrush 9.2 A, within 1.4–3.3 Ω design range
C2 + C32 + C4	540 µF, 35 V	≤ 0.93 V ripple at 500 Hz, peak load
C3, C6	100 nF	HF bypass
D2	M7	Reverse-polarity protection
R5 / R1	1 kΩ / 4.7 kΩ	V_OUT = 7.01 V
C1	2.2 nF C0G/X7R	Feedforward lead compensation (datasheet Table 9-6, interpolated for 7 V)
L1	47 µH	DCM at typical load, acceptable per datasheet for light loads
CR2	SS34	Schottky, 40 V, 3 A
C5	220 µF, ≥ 16 V	Within datasheet range

References

• TI LM2596 datasheet
• 1N4007, M7 and SS34 values from standard manufacturer datasheets (Vishay/onsemi)