XFR - sjsoftware/centurion-cpu6 GitHub Wiki
XFR - Transfer
Double Register Operation
| Byte 1 | Byte 2 | Byte 3 (opt) | Byte 4 (opt) |
|--------------|-------------------------|--------------|--------------|
| | | 7 6 5 | 4 | 3 2 1 | 0 | | |
| 5 5 | S | E1 | D | E2 | Addr/Imm H | Addr/Imm L |
- S - Source Register pair indicator, 0 = A, 1 = B etc.
- D - Destination Register pair indicator
- E1, E2 - Extended addressing modes
E1/E2 - even/odd (direct)
D <- (Addr)
E1/E2 - odd/even (immediate/literal)
D <- Imm
E1/E2 - odd/odd (indexed displacement)
D <- addr(S)
E1/E2 - even/even
D <- S