STK - sjsoftware/centurion-cpu6 GitHub Wiki
STK - Push multiple registers
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | 7 6 5 4 | 3 2 1 0 |
|---|---|---|---|---|---|---|---|---|---|
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | Byte Register | Count - 1 |
Push multiple 8 bit registers to the stack.
The highest register is the byte register plus count - 1.
Registers are pushed from last (highest) to first.
If the stack pointer is pushed, it is the stack pointer before the operation starts.
Note that the assembler will only allow an even register (or register pair) as valid syntax for this instruction.
Bugs
This operation can overflow and wrap to push P following A.
Microcode
190 0 CRY0 r00 r00 PASS A+Q P P P 633 33 (cc) JSR BADR READ.SWP (190)
0 CRY0 r00 r05 RAM NOT.D P P P 00f 0f (f0) BUS.WAIT INC.MAR READ.CONST (191)
0 CRY0 r05 r04 RAM D.AND.A D D D 433 33 (cc) LOAD.SWP READ.DB (192)
0 CRY0 r00 r09 RAM NOT.D P P P 00a 0a (f5) LOAD.RIR READ.CONST (433)
1 RLO CRY0 r00 r00 PASS A+Q P P P 466 66 (99) JSR PE READ.SWP (434)
1 CRY0 r00 r00 PASS D D D D 644 44 (bb) LOAD.RR READ.RF (435)
0 CRY0 r00 r00 PASS D D D D 3ce ce (31) LOAD.ALO LOAD.RR READ.RF (644)
0 CRY0 r00 r00 PASS A+Q D D D 3ea ea (15) LOAD.AHI READ.SWP (3ce)
0 CRY0 r00 r00 PASS A+Q D D A 280 80 (7f) LOAD.AHI LOAD.ALO LOAD.MAR READ.SWP (3ea)
28e 0 CRY0 r04 r09 RAM D+A D D D 3fc fc (03) LOAD.RIR READ.SWP (28e)
1 CRY0 r00 r06 PASS A+Q D D D 2ce ce (31) DIR- READ.SWP (3fc)
0 CRY0 r00 r00 PASS D D D D 3fe fe (01) INC.MAR LOAD.DBR LOAD.RR READ.RF (2ce)
0 CRY0 r00 r00 PASS A+Q D D D 29d 9d (62) BUS.WT READ.SWP (3fe)
0 CRY0 r00 r09 RAM B-1 P P P 66c 6c (93) JSR BADW LOAD.RIR READ.SWP (29d)
0 CRY0 r00 r00 PASS A+Q P P P 785 85 (7a) JSR DMA BUS.WAIT READ.SWP (29e)
0 CRY0 r00 r04 RAM B-1 D D D 2cd cd (32) LOAD.FLR READ.SWP (29f)
1 CRY0 r00 r06 PASS A+Q COND SIGN P P D 0ce ce (31) DIR- READ.SWP (2cd)
2cf 0 CRY0 r00 r07 PASS NOT.D D D P 2aa aa (55) DIR+ LOAD.RIR READ.CONST (2cf)
2a0 0 CRY0 r00 r00 PASS D P P P 000 00 (ff) LOAD.RR READ.ALO (2a0)
1 RLO CRY0 r05 r00 PASS D.EQV.A D D D 3fa fa (05) WRITE.RF LOAD.RR READ.AHI (2a1)
1 CRY0 r00 r00 PASS A+Q D D D 100 00 (ff) WRITE.RF LOAD.MAR READ.SWP (3fa)