SRR - sjsoftware/centurion-cpu6 GitHub Wiki
SRR - Shift Right Register
Single register instruction
| Byte 1 | Byte 2 |
|--------------|---------------------|
| | | 7 6 5 | 4 | 3 2 1 0 |
| 3 4 | R | 0 | I |
- R - Register pair indicator, 0 = A, 1 = B etc.
- I - Immediate. Register is arithmetic shifted right by 1 + I
Pseudocode
temp = R
do
L = temp & 1
temp >>= 1
while (I--)
R = temp
M = R & 8000
V = R == 0