P <- PC
r00 <- r06 >> 4 (map + abort on overflow)
r02 <- CCR
RR <- r02 | r00
C(low byte) <- RR; CLR <- C (high byte/nibble) - we are now at previous interrupt level
r03 <- C (low byte); RR <- C(low byte); SWP <- C(low byte)
CCR <- RR
r06(high nibble) <- C(low byte/nibble)
PC <- P
MAP <- r03
50a r00 r09 RAM NOT.D D D D 43e 3e (c1) LOAD.RIR READ.CONST (50a) RIR <- 3e ;* P
r00 r00 PASS D D D D 20c 0c (f3) LOAD.RR READ.ALO (43e) RR <- ALO
I RLO r00 r00 RAM D P P P 000 00 (ff) WRITE.RF READ.AHI (20c) RF <- RR; r00 <- AHI
r00 r00 PASS D.XOR.A P P P 00f 0f (f0) LOAD.RR READ.CONST (20d) RR <- r00 ^ f0
I RSAS r06 r00 RSH A P P P 000 00 (ff) BUS.WAIT WRITE.RF READ.SWP (20e) RF <- RR; r00 <- A >> 1
RSAS r00 r00 RSH A D D D 26b 6b (94) READ.SWP (20f) r00 >>= 1
RSAS r00 r00 RSH A P P P 785 85 (7a) JSR DMA READ.SWP (26b) r00 >>= 1
RSAS r00 r00 RSH NOT.D.AND.A P P P 01e 1e (e1) READ.CONST (26c) r00 <- (r00 & 1e) >> 1 ;* r00 has map/trap on fault flag in low nibble
CRY0 r09 r09 PASS A+B D D D 278 78 (87) LOAD.RIR READ.SWP (26d) RIR <- r09 << 2 ;* C
r00 r01 RAM NOT.D P P P 0f0 f0 (0f) READ.CONST (278) r01 <- f0
r00 r02 RAM NOT.D.AND.A D D D 28d 8d (72) READ.CCR (279) r02 <- CCR & r00 ;* CCR
I r02 r00 PASS A.OR.B D D D 480 80 (7f) LOAD.RR READ.SWP (28d) RR <- r02 | r00 ;* high byte CCR | map + tf
I RLO r00 r00 PASS D D D D 484 84 (7b) WRITE.RF LOAD.ILR READ.RF (480) ILR <- RF; RF <- RR ;* load previous ILR
I RLO r09 r00 PASS A P P P 000 00 (ff) LOAD.RIR READ.SWP (484) RIR <- r09 ;* P at new level
r00 r03 RAM D D D D 490 90 (6f) LOAD.SWP LOAD.RR READ.RF (485) r03 <- RF (previous); RR <- r03; SWAP <- r03
r00 r00 PASS A+Q P P P 102 02 (fd) LOAD.CCR READ.SWP (490) CCR <- RR
r01 r00 RAM D.AND.A D D D 460 60 (9f) READ.SWP (491) r00 <- r01 & SWAP
r01 r06 RAM NOT.A.AND.B P P P 785 85 (7a) JSR DMA READ.SWP (460) r06 &= ~r01 ;* clear high nibble
I RLO r00 r06 RAM A.OR.B P P P 000 00 (ff) READ.SWP (461) r06 |= r00 ;* map/fault trap from old C
I r00 r00 PASS D P P P 000 00 (ff) LOAD.RR READ.RF (462) ;* load C
r00 r00 PASS D P P P 000 00 (ff) LOAD.ALO LOAD.RR READ.RF (463)
r03 r00 PASS A P P P 000 00 (ff) LOAD.AHI LOAD.MAP READ.SWP (464) map <- r03 ;* load map
r00 r00 PASS A+Q D D D 100 00 (ff) LOAD.MAR READ.SWP (465) MAR ;* (PC <- P)