HLT - sjsoftware/centurion-cpu6 GitHub Wiki
00 HLT
Halts the CPU6
The HLT instruction will check the current interrupt level. If the interrupt level is 15, then the CPU6 enters the Halt state which can be exited with a backplane interrupt or DMA interrupt, or by toggling the R or I dip switches. If the interrupt level is not 15, then HLT will trigger an abort trap with value 1.
Bugs
HLT does not Halt unless interrupt level is 15.
Pseudocode
If map level < 4 then
if interrupt level < 15 then
abort 1
end else
halt
end if
end else
abort 1
end if
Microcode
500 CRY0 r00 r00 RAM NOT.D D D D 7b2 b2 (4d) READ.MSR (500) ;* !CL
CRY0 r00 r00 PASS NOT.D.AND.A P P D 0f0 f0 (0f) LOAD.FLR READ.CONST (7b2) ;* !CL & f0 (any bits are 1?)
CRY0 r00 r00 Q ZERO COND Z P P D 0c1 c1 (3e) BUS.WAIT READ.SWP (7b0) ;* zero?
CRY1 r00 r00 PASS Q+0 D D D 105 05 (fa) LOAD.RR READ.SWP (7b1) ;* no - trap 1
7b3 CRY0 r00 r09 RAM NOT.D D D D 71e 1e (e1) LOAD.RIR READ.CONST (7b3) ;* yes - halt level 15