GPIO Pin Mappings - retrofw/retrofw.github.io GitHub Wiki
General Purpose I/O pins represent pins on the CPU that can be wired to external devices for device-specific purposes. This page attempts to document how each class of device wires these pins.
GPIO pins on the JZ4760 and JZ4770 processors are broken into 6 different banks of pins known as "Ports". These are lettered A through F, but are addressed in software as 0 through 5.
GPIO Port A = 0
GPIO Port B = 1
GPIO Port C = 2
GPIO Port D = 3
GPIO Port E = 4
GPIO Port F = 5
GPIO Port A
| Pin |
Identifier |
RS-97 |
GCW0 |
PAP KIII |
| 0 |
sd0 |
|
|
|
| 1 |
sd1 |
|
|
|
| 2 |
sd2 |
|
|
|
| 3 |
sd3 |
|
|
|
| 4 |
sd4 |
|
|
|
| 5 |
sd5 |
|
OTG Hotplug |
|
| 6 |
sd6 |
|
|
|
| 7 |
sd7 |
|
|
|
| 8 |
sd8 |
|
|
|
| 9 |
sd9 |
|
|
|
| 10 |
sd10 |
|
|
|
| 11 |
sd11 |
|
|
|
| 12 |
sd12 |
|
|
|
| 13 |
sd13 |
|
|
|
| 14 |
sd14 |
|
|
|
| 15 |
sd15 |
|
|
|
| 16 |
rd |
|
|
|
| 17 |
we |
|
|
|
| 18 |
fre |
|
|
|
| 19 |
fwe |
|
|
|
| 20 |
msc0_d0 |
|
|
|
| 21 |
cs1 |
|
|
|
| 22 |
cs2 |
|
|
|
| 23 |
cs3 |
|
|
|
| 24 |
cs4 |
|
|
|
| 25 |
cs5 |
|
|
|
| 26 |
cs6 |
|
|
|
| 27 |
wait |
|
|
|
| 28 |
dreq0 |
|
|
|
| 29 |
dack0 |
|
|
|
| 30 |
- |
|
Power Button |
|
| 31 |
- |
|
|
|
GPIO Port B
| Pin |
Identifier |
RS-97 |
GCW0 |
PAP KIII |
| 0 |
sa0_cl |
|
|
|
| 1 |
sa1_al |
|
|
|
| 2 |
sa2 |
|
|
|
| 3 |
sa3 |
|
|
|
| 4 |
sa4 |
|
|
|
| 5 |
sa5 |
|
USB Charger |
|
| 6 |
cim_pclk |
|
|
|
| 7 |
cim_hsyn |
|
|
|
| 8 |
cim_vsyn |
|
|
|
| 9 |
cim_mclk |
|
|
|
| 10 |
cim_d0 |
|
Tab (L) |
|
| 11 |
cim_d1 |
|
PgDn (R2) |
|
| 12 |
cim_d2 |
|
Volume Up |
|
| 13 |
cim_d3 |
|
Volume Down |
|
| 14 |
cim_d4 |
|
Numpad Slash (L3) |
|
| 15 |
cim_d5 |
|
Numpad Period (R3) |
|
| 16 |
cim_d6 |
|
|
|
| 17 |
cim_d7 |
|
|
|
| 18 |
cim_d8 |
|
|
|
| 19 |
cim_d9 |
|
|
|
| 20 |
msc2_d0 |
|
PgUp (L2) |
|
| 21 |
msc2_d1 |
|
Enter (Start) |
|
| 22 |
tsd2 |
|
|
|
| 23 |
tsd3 |
|
|
|
| 24 |
tsd4 |
|
|
|
| 25 |
tsd5 |
|
|
|
| 26 |
tsd6 |
|
|
|
| 27 |
tsd7 |
|
|
|
| 28 |
msc2_clk |
|
|
|
| 29 |
msc2_cmd |
|
|
|
| 30 |
msc2_d2 |
|
Power LED |
|
| 31 |
msc2_d3 |
|
|
|
GPIO Port C
| Pin |
Identifier |
RS-97 |
GCW0 |
PAP KIII |
| 0 |
lcd_b0 |
|
|
|
| 1 |
lcd_b1 |
|
|
|
| 2 |
lcd_b2 |
|
|
|
| 3 |
lcd_b3 |
|
|
|
| 4 |
lcd_b4 |
|
|
|
| 5 |
lcd_b5 |
|
|
|
| 6 |
lcd_b6 |
|
|
|
| 7 |
lcd_b7 |
|
|
|
| 8 |
lcd_pclk |
|
|
|
| 9 |
lcd_de |
|
|
|
| 10 |
lcd_g0 |
|
|
|
| 11 |
lcd_g1 |
|
|
|
| 12 |
lcd_g2 |
|
|
|
| 13 |
lcd_g3 |
|
|
|
| 14 |
lcd_g4 |
|
|
|
| 15 |
lcd_g5 |
|
|
|
| 16 |
lcd_g6 |
|
|
|
| 17 |
lcd_g7 |
|
|
|
| 18 |
lcd_hsyn |
|
|
|
| 19 |
lcd_vsyn |
|
|
|
| 20 |
lcd_r0 |
|
|
|
| 21 |
lcd_r1 |
|
|
|
| 22 |
lcd_r2 |
|
|
|
| 23 |
lcd_r3 |
|
|
|
| 24 |
lcd_r4 |
|
|
|
| 25 |
lcd_r5 |
|
|
|
| 26 |
lcd_r6 |
|
|
|
| 27 |
lcd_r7 |
|
|
|
| 28 |
uart2_rxd |
|
UART Receive 2 |
|
| 29 |
uart2_cts |
|
|
|
| 30 |
uart2_txd |
|
UART Transmit 2 |
|
| 31 |
uart2_rts |
|
|
|
GPIO Port D
| Pin |
Identifier |
RS-97 |
GCW0 |
PAP KIII |
| 0 |
pcm0_do |
|
|
|
| 1 |
pcm0_clk |
|
|
|
| 2 |
pcm0_syn |
|
|
|
| 3 |
pcm0_di |
|
|
|
| 4 |
ps2_mclk |
|
I2C Clock 3 |
|
| 5 |
ps2_mdata |
|
I2C Data 3 |
|
| 6 |
ps2_kclk |
|
I2C Data 4 |
|
| 7 |
ps2_kdata |
|
I2C Clock 4 |
|
| 8 |
scc_data |
|
|
|
| 9 |
scc_clk |
|
|
|
| 10 |
pwm6 |
|
|
|
| 11 |
pwm7 |
LCD Clock |
|
|
| 12 |
uart3_rxd |
|
|
|
| 13 |
lrclk0 |
|
|
|
| 14 |
- |
|
|
|
| 15 |
exclk |
|
|
|
| 16 |
- |
|
|
|
| 17 |
- |
|
|
|
| 18 |
- |
|
Escape (Select) |
|
| 19 |
- |
|
|
|
| 20 |
msc1_d0 |
|
|
|
| 21 |
msc1_d1 |
|
|
|
| 22 |
msc1_d2 |
|
|
|
| 23 |
msc1_d3 |
|
|
|
| 24 |
msc1_clk |
|
|
|
| 25 |
msc1_cmd |
|
|
|
| 26 |
uart1_rxd |
|
|
|
| 27 |
uart1_cts |
|
|
|
| 28 |
uart1_txd |
|
|
|
| 29 |
uart1_rts |
|
|
|
| 30 |
i2c0_sda |
|
I2C Data 0 |
|
| 31 |
i2c0_sck |
|
I2C Clock 0 |
|
GPIO Port E
| Pin |
Identifier |
RS-97 |
GCW0 |
PAP KIII |
| 0 |
pwm0 |
LCD Enable |
|
|
| 1 |
pwm1 |
|
LCD Backlight |
|
| 2 |
pwm2 |
LCD Data |
LCD Reset |
|
| 3 |
pwm3 |
|
|
|
| 4 |
pwm4 |
LCD Reset |
Rumble Motor |
|
| 5 |
pwm5 |
|
|
|
| 6 |
aic0_sdati |
|
|
|
| 7 |
aic0_sdato |
|
|
|
| 8 |
uart3_cts |
|
|
|
| 9 |
uart3_rts |
|
|
|
| 10 |
drvvbus |
|
|
|
| 11 |
sdato1 |
|
|
|
| 12 |
sdato2 |
|
|
|
| 13 |
sdato3 |
|
|
|
| 14 |
ssi0_dr |
|
|
|
| 15 |
ssi0_clk |
|
LCD Clock |
|
| 16 |
ssi0_ce0 |
|
LCD Enable |
|
| 17 |
ssi0_dt |
|
LCD Data |
|
| 18 |
ssi0_ce1 |
|
|
|
| 19 |
ssi0_gpc |
|
|
|
| 20 |
msc0_d0 |
|
Left ALT (B) |
|
| 21 |
msc0_d1 |
|
Button Up |
|
| 22 |
msc0_d2 |
|
|
|
| 23 |
msc0_d3 |
|
Button Left |
|
| 24 |
msc0_d4 |
|
Button Right |
|
| 25 |
msc0_d5 |
|
Button Down |
|
| 26 |
msc0_d6 |
|
Backspace (R) |
|
| 27 |
msc0_d7 |
|
Spacebar (X) |
|
| 28 |
msc0_clk |
|
Left SHIFT (Y) |
|
| 29 |
msc0_cmd |
|
Left CTRL (A) |
|
| 30 |
i2c1_sda |
|
I2C Data 1 |
|
| 31 |
i2c1_sck |
|
I2C Clock 1 |
|
GPIO Port E
| Pin |
Identifier |
RS-97 |
GCW0 |
PAP KIII |
| 0 |
uart0_rxd |
|
|
|
| 1 |
uart0_cts |
|
|
|
| 2 |
uart0_rts |
|
|
|
| 3 |
uart0_txd |
|
Headphone Out |
|
| 4 |
mii_txd0 |
|
|
|
| 5 |
mii_txd1 |
|
|
|
| 6 |
mii_txclk |
|
|
|
| 7 |
mii_rxclk |
|
|
|
| 8 |
mii_rxer |
|
|
|
| 9 |
mii_rxdv |
|
|
|
| 10 |
mii_rxd0 |
|
USB voltage regulator |
|
| 11 |
mii_rxd1 |
|
|
|
| 12 |
mii_txen |
|
|
|
| 13 |
mii_mdc |
|
|
|
| 14 |
mii_mdio |
|
|
|
| 15 |
mii_col |
|
|
|
| 16 |
cim_d10 |
|
USB OTG |
|
| 17 |
cim_d11 |
|
|
|
| 18 |
sysclk |
|
USB OTG ID |
|
| 19 |
bclk1 |
|
|
|
| 20 |
irclk1 |
|
Speaker Out |
|
| 21 |
aic1_sdati |
|
Headphone Detect |
|
| 22 |
aic1_sato |
|
|
|