Renesas R Car Gen5 Zephyr Support - renesas/zephyr GitHub Wiki

Table of contents

Overview

This page describes the content of R-Car X5H Automotive System-on-Chip (SoC) Zephyr components, restrictions, and points for caution. This product is an Alpha version of a product under development. Please read the following notes carefully before using this product.

System Requirements

Note: This release version is currently supported on https://docs.zephyrproject.org/4.4.0/. Support for newer versions will be added in future releases.

Supported Host OS

  • Ubuntu version 22.04/24.04 LTS and later
  • Windows 10 or 11

Zephyr Development Environments

For development environment setup, please refer to the Getting started for Zephyr v4.4.0.

For getting the Zephyr source code step, please use the following command instead of the default west initialization command to get wip_rcarsoc repository:

Work In Progress (WIP) branch

Branch name Information
ZephyrOS:wip_rcarsoc Includes Zephyr OS, device drivers, board support, and related components.
hal_renesas:wip_rcarsoc Includes the HAL layer of Renesas R-Car X5H SoC source code

Release tag: https://github.com/renesas/zephyr/tree/wip_rcarsoc_20260810

Supported Devices List

Group name Chip Part Number/SoC Name
R-Car X5H r8a78000

Supported Boards List

Board name (Zephyr board name) Status Samples and Demo hardware connection
R-Car X5H Ironhide Available on Renesas wip_rcarsoc branch R-Car X5H Ironhide Sample and Demo hardware configuration

HWIP and Driver List

Renesas HW IP Mapping to Zephyr Status Board
I/O Ports (PFC/GPIO) GPIO Available on Renesas wip_rcarsoc branch All available devices
I/O Ports (PFC/GPIO) Pinctrl Available on Renesas wip_rcarsoc branch All available devices
SCIF1 (UART) UART Available on Renesas wip_rcarsoc branch All available devices
Generic Timer System Timer Available on Renesas wip_rcarsoc branch All available devices
Clock Controller Clock Control Available on Renesas wip_rcarsoc branch All available devices
I2C I2C Available on Renesas wip_rcarsoc branch All available devices
RT-DMAC SYS-DMAC Audio-DMAC SCP-DMAC DMA Available on Renesas wip_rcarsoc branch All available devices
SSIU SSI ADG I2S Available on Renesas wip_rcarsoc branch All available devices
AK4619 Audio Codec Available on Renesas wip_rcarsoc branch All available devices
TSNES RSW3 ETH-PCS Ethernet Available on Renesas wip_rcarsoc branch All available devices
MDIO MDIO Available on Renesas wip_rcarsoc branch All available devices
DP83869 (Texas Instruments) Ethernet PHY Available on Renesas wip_rcarsoc branch All available devices
Q32xx Ethernet PHY Will be available on Renesas wip_rcarsoc branch All available devices
Multi Protocol PHY - Available on Renesas wip_rcarsoc branch All available devices

Samples

Refer to the R-Car X5H Ironhide Sample and Demo hardware configuration section in the sidebar for instructions on executing the samples.

Limitations

Software

No# Zephyr Driver Known Limitation
1 ARCH (Architecture) The MPU implementation is available but has not yet been verifired on the X5H device (plan to verified in next release), please use it with care
2 I2C DMA-based transfers are not supported. All I2C transactions are performed using CPU-driven transfer mode.
3 DMA Cyclic transfer mode is not supported. Only Normal transfer modes are available. Peripheral transfer modes on RT-DMAC and SCP-DMAC are not currently supported.
4 Interrupt Controller Dynamic and direct interrupt handling have not yet been tested, only static interrupt handling has been verified.
5 UART Asynchronous APIs (DMA-based transfer) are not supported.
6 Clock Control The current Clock Control driver does not yet use the Gen5 SCP-managed SCMI interface and continues to access clock resources through the existing direct clock control mechanism. Therefore, runtime clock management via SCP is not available in this release. Migration to SCMI-based clock management is planned for a future release. The clock_control_configure() API, which enables run-time clock changes, is not supported, this is considered low priority.
7 Ethernet AVB/TSN features are not supported, including hardware timestamping for gPTP/PTP, Qav/CBS traffic shaping, VLAN PCP-based priority handling, scheduled traffic, AVTP/AVB support, and frame preemption. Only basic routing (forwarding) is supported on RSwitch3, which is required by the Ethernet (TSNES) driver.
8 MDIO/Ethernet A hardware resource conflict with U-Boot and Linux occurs when using ETH/MDIO driver, this issue will be solved by providing the patchese for U-Boot and Linux source to avoid the share resoures among cores.
9 MP-PHY Only MP-PHY configuration for Ethernet is supported, other functions such as PCIe and USB are not supported.

Hardware

No# Zephyr Driver Known Limitation
1 DMA Cyclic transfer mode is not supported. Only Normal transfer modes are available.
2 Clock Control The clock_control_async_on() API is not supported, as it requires a hardware feature that is not currently available.
3 Audio Subsystem Only half-duplex communication is supported, which is the minimum required to support the AK4619 codec on the X5H board (only one (SD) data line is available). Only the SSI05 channel is supported, to match the current AK4619 support on the X5H board. The 44.1 kHz sample rate cannot be tested, since the board uses a 24.576 MHz crystal. The Ironhide X5H board lacks a DC bias circuit on the CN39 microphone input. Therefore, recording requires a self-powered microphone or a connection to audio line-out port of PC.

Next Release

Release version Release date Release Scope
Phase3 Oct 30 2026 Support module: The plan is still under discussion.

[Watchdog]: https://docs.zephyrproject.org/latest/hardware/peripherals/watchdog.html