RZV2N‐EVK Sample and Demo hardware configuration - renesas/zephyr GitHub Wiki

Followings are hardware connection and test samples for RZ/V2N-EVK, for more detail on 1st setup hardware connection, please visit RZ/V2N Group User's Manual: Hardware and RZ/V Getting Started with Flexible Software Package

Default HW configuration

HW	Configurations	Remark
DSW1-1	ON	CA55 Boot CPU
DSW1[2:3]	OFF, ON	Input the CA55 frequency at the CA55 cold boot - 1.7GHz
DSW1[4:5]	ON, OFF	Input the boot mode select signal - eSD
DSW1-7	ON	JTAG Debug mode

The UART port is accessed by connecting Pmod USBUART to the upper side of PMOD Type 3A.

Hardware connection for UART samples

• echo_bot (samples/drivers/uart/echo_bot):

  • Hardware configuration: No additional connection.
  • Build command: west build -p always -b rzv2n_evk/r9a09g056n48gbg/cm33 samples/drivers/uart/echo_bot

• zTest uart_basic_api (tests/drivers/uart/uart_basic_api):

  • Hardware configuration: No additional connection.
  • Build command: west build -p always -b rzv2n_evk/r9a09g056n48gbg/cm33 tests/drivers/uart/uart_basic_api

Hardware connection for GPIO samples

• Blinky (samples/basic/blinky): Simple LED blinky

  • HW configuration: No additional connection.
  • Build command: west build -p always -b rzv2n_evk/r9a09g056n48gbg/cm33 samples/basic/blinky

• zTest gpio_api_1pin (tests/drivers/gpio/gpio_api_1pin):

  • Hardware configuration: No additional connection
  • Build command: west build -p always -b rzv2n_evk/r9a09g056n48gbg/cm33 tests/drivers/gpio/gpio_api_1pin

• zTest gpio_basic_api (tests/drivers/gpio/gpio_basic_api):

  • Hardware configuration:

    • Wire P8_1 (PmodType1A - 2) to pin P8_0 (Pmod1Type1A - 1)

  • Build command: west build -p always -b rzv2n_evk/r9a09g056n48gbg/cm33 tests/drivers/gpio/gpio_basic_api