RZG2UL‐SMARC Sample and Demo hardware configuration - renesas/zephyr GitHub Wiki
Followings are hardware connection and test samples for RZ/G2UL-SMARC, for more detail on 1st setup hardware connection, please visit RZ/G2UL Group User's Manual: Hardware and RZ/G2L, RZ/G2LC, RZ/G2UL, RZ/G3S Getting Started with Flexible Software Package
Default HW configuration
HW | Configurations | Remark |
---|---|---|
SW11[1:4] | OFF, OFF, OFF, ON | Boot mode 3(QSPI Boot (1.8V) Mode) |
SW1-1 | OFF | JTAG Debug mode |
By default, J-Link RTT Viewer is used by Zephyr running on CM33 for providing serial console. The only serial port (SER3_UART micro-USB) is reserved for CA55 to run Linux.
Hardware connection for UART samples
-
echo_bot (samples/drivers/uart/echo_bot):
- Hardware configuration: No additional connection.
- Build command:
west build -p always -b rzg2ul_smarc/r9a07g043u11gbg/cm33 samples/drivers/uart/echo_bot
-
zTest uart_basic_api (tests/drivers/uart/uart_basic_api):
- Hardware configuration: No additional connection.
- Build command:
west build -p always -b rzg2ul_smarc/r9a07g043u11gbg/cm33 tests/drivers/uart/uart_basic_api
Hardware connection for GPIO samples
-
zTest gpio_api_1pin (tests/drivers/gpio/gpio_api_1pin):
- Hardware configuration: No additional connection
- Build command:
west build -p always -b rzg2ul_smarc/r9a07g043u11gbg/cm33 tests/drivers/gpio/gpio_api_1pin
-
zTest gpio_basic_api (tests/drivers/gpio/gpio_basic_api):
-
Hardware configuration:
- Wire P1_3 (Pmod0 - 9) to pin P1_4 (Pmod0 - 10)
-
Build command:
west build -p always -b rzg2ul_smarc/r9a07g043u11gbg/cm33 tests/drivers/gpio/gpio_basic_api
-