P3X OFDM Receiver board - randomlettersandnumbers/DJI-Stuff GitHub Wiki

Table of Contents

Function
Variants
Parts
Programming
External interfaces
Service interfaces
Board view
Schematics

Function

The OFDM Receiver module is responsible for pairing with RC and communicating with it. The name comes from Orthogonal Frequency Division Multiplexing - which is a way of transferring broadband data. It implements the Lightbridge technology, and is also a middleman between the gimbal and flight controller.

Variants

There are multiple versions of the board, with two major lines. The older OFDM boards implement Lightbridge via Altera FPGA chip, while later boards use Artosyn Custom Radio chips. Switching from multi-purpose chips to dedicated transceivers reduced cost and power consumption of the boards. The Custom Chip manufactured by Artosyn has a design which exactly matches the previously used FPGA bitstream, so both boards are compatible with all GL300 Radio Controllers.

Marking Overview
P01007.06 First known version.
P01007.08 Switched to different voltage regulators.
P01007.14 Switched from FPGA to Custom Chip; often called OFDM v2 module.

Parts

Version P01007.06 components

Full list of known components is presented in the table.

Marking Amt. Pkg. Function Specification
STM32F 103CBU6 GH24W 93 CHN 516 1 48-lead 7x7 UFQFPN Mainstream Performance line, ARM Cortex-M3 MCU with 128 Kbytes Flash, 72 MHz CPU, motor control, USB and CAN; Lightbridge MCU description
ATH520 64DM Y 1 8-pin SPI Serial EPPROM integrated chip; FPGA bitstream storage
25Q064A 13E40 60 CHN 51712S 1 8-pin 4x5 SOP Micron Serial NOR Flash Memory; 64Mb, 1.8V, Multiple I/O, 4KB Sector Erase datasheet
AEKF 1 8-pin SOT23 Maxim MAX3051EKA-T CAN Transceiver
PA 5QA 1 3x3 UDFN/WSON Mini Linear Regultor; part used is DI AP7361ADJ, but it could also be TI TPS7A16 DI datasheet TI description
1755 ADJ #518 0220 1 16-lead 4x4 LFCSP-WQ 1.2A Low-Vin, Adjustable-Vout LDO Linear Regulator description
AD9363 BBCZ #1518 3144402.1 Singapore 1 144-ball 10x10 CSP-BGA Analog Devices Agile Radio frequency (RF) 2x2 transceiver with integrated 12-bit DACs and ADCs; Lightbridge RF part description
VUBI TI 54 SI8F 3 16-pin 3x3 QFN-4444 Texas Instruments TLV62130RGTR 3V to 17V 3A Step-Down Converter description
22003 KA1614 CL012 2 16-lead 3x3 QFN Avago MGA-22003 2.3-2.7 GHz WiMAX and WiFi Power Amplifier description
9037 6620 2 8-lead 2x2 QFN-44 TriQuint TQP3M9037 Ultra Low Noise, High Linearity LNA datasheet
S 20 4 6-lead 1.5x1.5 QFN-33 SKY13320-374LF: 0.1-6.0 GHz GaAs SPDT Switch description
302AMIL 59400M 1519 1
AC 1 diode?
TK2S 519 1 Quartz oscillator?
T120 MeLS 1 Quartz oscillator, 12 MHz
24.000 53 Rite 1 Quartz oscillator, 24 MHz
Altera Cyclone V 5CEFA4U19I7 1 484-ball UFBGA FPGA; Cyclone V E model 5CEA4, temp. range -40 to 100 deg C; Lightbridge digital part; handles input and output data streams of the RF transceiver description
CY7C68013A-56 LTXC 1531 B 04 CYP squareC 1 56-lead 8x8 QFN EZ-USB FX2LP USB Microcontroller High-Speed USB Peripheral Controller; receives video from camera description

Version P01007.08 components

The part list is almost identical to P01007.08. The changes are TLV62130RGTR regulators which have been replaced. Only new components will be provided in the table.

Marking Amt. Pkg. Function Specification
IAEU6 2 Step-Down Converter

Version P01007.14 components

Full list of known components is presented in the table.

Marking Amt. Pkg. Function Specification
STM32F 103CBU6 GH24W 93 CHN 536 1 Mainstream Performance line, ARM Cortex-M3 MCU with 128 Kbytes Flash, 72 MHz CPU, motor control, USB and CAN; Lightbridge MCU description
ATH542 64DM Y A3GXAA 1 8-pin SPI Serial EPPROM integrated chip; FPGA bitstream storage
AEKF 1 Maxim MAX3051EKA-T CAN Transceiver
K7K CN 1
PA 6DA 1 Step-Down Converter?
Xlat 20.000 605E 1 quartz oscillator, 20 MHz
M9Y9975 46.5.8 1 quartz oscillator?
S 20 4 SKY13320-374LF: 0.1-6.0 GHz GaAs SPDT Switch description
Xlat 24.000 68 1 quartz oscillator, 24 MHz
Xlat T120 Px25 1 quartz oscillator, 12 MHz
IAEU6 2 Step-Down Converter
53 625 1
VS6 U 1
CY7C68013A-56 LTXC 1531 B 04 TWN CYP 626064 squareC 1 EZ-USB FX2LP USB Microcontroller High-Speed USB Peripheral Controller; receives video from camera description
PA 5206 WNSA 2
Artosyn AR8003 CAK841 1603 1 Lightbridge RF transciever
Artosyn AR8001 612P6042 1 Lightbridge Data encoder; handles input and output data streams of the RF transceiver

Programming

Chips Firmware Description
cy7c68013a [m1500](/randomlettersandnumbers/DJI-Stuff/wiki/Firmware-m1500) Provides communication with camera module, including video transmission.
Altera Cyclone 5 E + ATH542 [m1900](/randomlettersandnumbers/DJI-Stuff/wiki/Firmware-m1900) Lightbridge FPGA air part; NAND flash memory stores the programming and the FPGA chip reads it during each startup.
STM32F103 [m0900](/randomlettersandnumbers/DJI-Stuff/wiki/Firmware-m0900) Lightbridge MCU; configures and drives FPGA and transciever.

External interfaces

Connectors on the board are:

Marking Overview
CAMERA 6-pin 1.25mm ribbon cable con. ribbon cable to the [Gimbal top board](/randomlettersandnumbers/DJI-Stuff/wiki/WM320-Gimbal-top-board)
CENTER 6-pin ribbon cable con. ribbon cable to the [ESC center board](/randomlettersandnumbers/DJI-Stuff/wiki/P3X-ESC-center-board)

Service interfaces

P01007.06 service pads

The following service pads exist on this board:

Marking Overview
DP CAMERA con. USB-DP; top side
DM CAMERA con. USB-DM; top side
GND CENTER con. ground; top side
6V CENTER con. power; top side
FAN_VCC Cooling fan con.; top side
FAN_GND Cooling fan con.; top side
GND Ground; top side
CLK Serial Wire Debug clock; top side
DIO Serial Wire Debug i/o; top side
3V3 Regulated 3.3V power supply; top side
GND Ground; top side
TX CENTER con. FC serial transmit; UART 256000 8n1; top side
RX CENTER con. FC serial receive; UART 256000 8n1; top side
GND CENTER con. ground; top side
6V CENTER con. power; bottom side
RD Cypress Slave FIFO mode read; bottom side
WR Cypress Slave FIFO mode write; bottom side
IFCLK Cypress IfClk; bottom side
3V3 Regulated 3.3V power; bottom side
MOSI SPI Master Output Slave Input line; bottom side
MISO SPI Master Input Slave Output line; bottom side
3V3 Regulated 3.3V power; marking behind connector; bottom side
NSS SPI Slave Select line; bottom side
SCK SPI Clock line; bottom side
TDO JTAG Test Data Out; bottom side
TCK JTAG Test Clock; bottom side
CANL CAN bus Lo line; bottom side
CANH CAN bus Hi line; bottom side
GND Ground; bottom side
2V5 Regulated 2.5V power; bottom side
1V1 Regulated 1.1V power; bottom side
DI unknown data in; bottom side
DO unknown data out; bottom side
1V3 Regulated 1.3V power; bottom side
CLK unknown clock; bottom side
ENB unknown enable; bottom side
1V7 Regulated 1.7V power; bottom side
TDI JTAG Test Data In; bottom side
TMS JTAG Test Mode Select; bottom side
FLAGB Cypress FlagB line; bottom side
FLAGC Cypress FlagC line; bottom side

P01007.14 service pads

The following service pads exist on this board:

Marking Overview
5V CENTER con. power; top side
GND CENTER con. ground; top side
DP CAMERA con. USB-DP; top side
DM CAMERA con. USB-DM; top side
FAN_VCC Cooling fan con.; top side
FAN_GND Cooling fan con.; top side
SWCLK Serial Wire debug clock; top side
SWDIO Serial Wire debug i/o; top side
GND Ground; top side
5V CENTER con. power; top side
RX CENTER con. FC serial receive; UART 256000 8n1; top side
TX CENTER con. FC serial transmit; UART 256000 8n1; top side
GND Ground; top side
MOSI SPI Master Output Slave Input line; bottom side
MISO SPI Master Input Slave Output line; bottom side
3V3 Regulated 3.3V power; marking behind connector
CANL2 CAN bus Lo line; bottom side
CANH2 CAN bus Hi line; bottom side
GND Ground; bottom side
SCK SPI Clock line; bottom side
NSS SPI Slave Select line; bottom side
3V3_MCU Power; bottom side
5V Power; bottom side
VDDA33_VCO1 ; bottom side
IFCLK Cypress IfClk; bottom side
SLRD# Cypress Slave FIFO mode read; bottom side
SLWR# Cypress Slave FIFO mode write; bottom side
FLAGC# Cypress FlagC line; bottom side
FLAGB# Cypress FlagB line; bottom side
RX1 UART serial interface 1 receive; bottom side
TX1 UART serial interface 1 transmit; bottom side
RX2 UART serial interface 2 receive; bottom side
TX2 UART serial interface 2 transmit; bottom side
GND Ground; bottom side
1V2 Regulated 1.2V power; bottom side
1V8 Regulated 1.8V power; bottom side
VCCMCU_3V3 Regulated 3.3V power; bottom side
CLK unknown clock; bottom side
ENB unknown enable; bottom side
DO unknown data out; bottom side
DI unknown data in; bottom side

Board view

Top of a P01007.06 board:

P3X OFDM Receiver board v6 A top

Bottom of the P01007.06 board:

P3X OFDM Receiver board v6 A bottom

Top of a second P01007.06 board (poor image but visible behind shielding):

P3X OFDM Receiver board v6 B top

Bottom of the second P01007.06 board:

P3X OFDM Receiver board v6 B bottom

Top of a third P01007.06 board (more markings visible):

P3X OFDM Receiver board v6 C top

Bottom of the third P01007.06 board:

P3X OFDM Receiver board v6 C bottom

Top of a fourth P01007.06 board (FPGA marking visible):

P3X OFDM Receiver board v6 D top

Bottom of the fourth P01007.06 board:

P3X OFDM Receiver board v6 D bottom

Top of a P01007.08 board:

P3X OFDM Receiver board v8 A top

Bottom of the P01007.08 board:

P3X OFDM Receiver board v8 A bottom

Top of a P01007.14 board:

P3X OFDM Receiver board v14 top

Bottom of the P01007.14 board:

P3X OFDM Receiver board v14 bottom

Schematics

The following schematics were made by enthusiasts: