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Zeljko Zilic [1] Zeljko Zilic,

a Croatian Canadian electrical engineer and computer scientist, and associate professor at McGill University. He holds a B. Eng from University of Zagreb and received his Ph.D. and M.Sc. from the University of Toronto. His research interests covers logic synthesis, testing, verification and debug FPGA, embedded, wireless and multiprocessor systems as well as algebraic, combinatorial and quantum algorithms [2].

Robin Grindley, Tarek Abdelrahman, Stephen Brown, Steve Caranci, D. DeVries, Benjamin Gamsa, Ante Grbić, Mitchell Gusat, R. Ho, Orran Krieger, Guy Lemieux, K. Loveless, Naraig Manjikian, P. McHardy, Sinisa Srbljic, Michael Stumm, Zvonko Vranesic, Zeljko Zilic (2000). The NUMAchine Multiprocessor. ICPP 2000, pdf
Marc Boulé, Zeljko Zilic (2002). An FPGA Move Generator for the Game of Chess. McGill University
Marc Boulé, Zeljko Zilic (2002). An FPGA Move Generator for the Game of Chess. ICGA Journal, Vol. 25, No. 2
Marc Boulé, Zeljko Zilic (2003). FPGA Hardware Acceleration: From Chess Playing to Automated Theorem Proving. poster presentation, Micronet 2003
Zeljko Zilic (2009). Designing and Using FPGAs beyond Classical Binary Logic: Opportunities in Nano-Scale Integration Age. ISMVL 2009

Jason G. Tong, Marc Boulé, Zeljko Zilic (2010). Defining and Providing Coverage for Assertion-Based Dynamic Verification. Journal of Electronic Testing, Vol. 26
Edin Kadric, Naraig Manjikian, Zeljko Zilic (2012). An FPGA implementation for a high-speed optical link with a PCIe interface. SoCC 2012
Jason G. Tong, Marc Boulé, Zeljko Zilic (2016). Accelerating assertion assessment using GPUs. HLDVT 2016