• NIFGEN_ATTRIBUTE_REF_CLOCK_FREQUENCY
• NIFGEN_ATTRIBUTE_REFERENCE_CLOCK_SOURCE
• NIFGEN_ATTRIBUTE_EXPORTED_REFERENCE_CLOCK_OUTPUT_TERMINAL
• NIFGEN_ATTRIBUTE_EXPORTED_ONBOARD_REFERENCE_CLOCK_OUTPUT_TERMINAL
• NIFGEN_ATTRIBUTE_ARB_SAMPLE_RATE
• NIFGEN_ATTRIBUTE_CLOCK_MODE
• NIFGEN_ATTRIBUTE_SAMPLE_CLOCK_SOURCE
• NIFGEN_ATTRIBUTE_EXPORTED_SAMPLE_CLOCK_OUTPUT_TERMINAL
• NIFGEN_ATTRIBUTE_EXPORTED_SAMPLE_CLOCK_DIVISOR
• NIFGEN_ATTRIBUTE_SAMPLE_CLOCK_TIMEBASE_RATE
• NIFGEN_ATTRIBUTE_SAMPLE_CLOCK_TIMEBASE_SOURCE
• NIFGEN_ATTRIBUTE_EXPORTED_SAMPLE_CLOCK_TIMEBASE_OUTPUT_TERMINAL
• NIFGEN_ATTRIBUTE_EXPORTED_SAMPLE_CLOCK_TIMEBASE_DIVISOR
• NIFGEN_ATTRIBUTE_EXTERNAL_SAMPLE_CLOCK_MULTIPLIER
• NIFGEN_ATTRIBUTE_SAMPLE_CLOCK_ABSOLUTE_DELAY
• NIFGEN_ATTRIBUTE_EXTERNAL_CLOCK_DELAY_BINARY_VALUE
• NIFGEN_ATTRIBUTE_OSCILLATOR_PHASE_DAC_VALUE

Numeric Value	Data Type	Access	Applies to	Coercion	High-Level Functions
1150107	ViReal64	R/W	N/A	None	None

Specifies the Reference clock frequency. The signal generator uses the Reference clock to derive frequencies and sample rates when generating output.

Note:  You cannot change this attribute while the device is generating a waveform. If you want to change the device configuration, call the niFgen_AbortGeneration function or wait for the generation to complete.

Numeric Value	Data Type	Access	Applies to	Coercion	High-Level Functions
1150113	ViString	R/W	N/A	None	None

Specifies the Reference Clock source used by the signal generator. For example, when you set this attribute to ClkIn, the signal generator uses the signal it receives at the CLK IN front panel connector as the Reference Clock.

The Reference Clock at the specified source phase-locks with the signal generator Sample Clock Timebase to allow the frequency stability and accuracy of the Sample Clock Timebase to match that of the Reference Clock.

Note:  The signal generator must not be in the Generating state when you change this attribute. To change the device configuration, call the niFgen_AbortGeneration function or wait for the generation to complete.

The following defined values are examples of possible Reference Clock sources. For a complete list of the Reference Clock sources available on your device, refer to the Routes topic for your device or the Device Routes tab in MAX.

Defined Value:

None	No Reference clock
NIFGEN_VAL_REF_CLOCK_INTERNAL	Internal Reference Clock
NIFGEN_VAL_REF_CLOCK_EXTERNAL	External Reference Clock
NIFGEN_VAL_REF_CLOCK_RTSI_CLOCK	RTSI clock
NIFGEN_VAL_REF_CLOCK_TTL7	TTL7
NIFGEN_VAL_PXI_CLK10	CLK10
NIFGEN_VAL_REF_IN	REF IN front panel connector
NIFGEN_VAL_RTSI_0	RTSI 0
NIFGEN_VAL_RTSI_1	RTSI 1
NIFGEN_VAL_RTSI_2	RTSI 2
NIFGEN_VAL_RTSI_3	RTSI 3
NIFGEN_VAL_RTSI_4	RTSI 4
NIFGEN_VAL_RTSI_5	RTSI 5
NIFGEN_VAL_RTSI_6	RTSI 6
NIFGEN_VAL_RTSI_7	RTSI 7
NIFGEN_VAL_CLK_IN	CLK IN front panel connector
NIFGEN_VAL_ONBOARD_REFERENCE_CLOCK	Onboard Reference Clock

Default Value: None

Note : These defined values are currently not supported for gRPC, instead pass the raw values directly.

Numeric Value	Data Type	Access	Applies to	Coercion	High-Level Functions
1150321	ViString	R/W	N/A	None	niFgen_ExportSignal

Specifies the terminal to which to export the Reference Clock. For a list of the terminals available on your device, refer to the Routes topic for your device or the Device Routes tab in MAX.

Numeric Value	Data type	Access	Applies to	Coercion	High Level Functions
1150322	ViString	R/W	N/A	None	niFgen_ExportSignal

Specifies the terminal to which to export the onboard Reference Clock. For a list of the terminals available on your device, refer to the Routes topic for your device or the Device Routes tab in MAX.

Numeric Value	Data Type	Access	Applies to	Coercion	High-Level Functions
1250204	ViReal64	R/W	N/A	None	niFgen_ConfigureSampleRate

Specifies the rate, in samples per second, at which the signal generator generates the points in arbitrary waveforms. Use this attribute when the NIFGEN_ATTRIBUTE_OUTPUT_MODE attribute is set to NIFGEN_VAL_OUTPUT_ARB or NIFGEN_VAL_OUTPUT_SEQ.

Note:  You cannot change this property while the device is generating a waveform. If you want to change the device configuration, call the niFgen_AbortGeneration function or wait for the generation to complete.

Units: Samples/s

Numeric Value	Data Type	Access	Applies to	Coercion	High-Level Functions
1150110	ViInt32	R/W	N/A	None	None

Controls the Sample clock mode for the signal generator.

For signal generators that support it, this property allows switching the Sample clock to a high-resolution clocking mode. When in divide-down sampling mode, the sample rate can only be set to certain frequencies, based on dividing down the update clock. However, in high-resolution mode, the sample rate may be set to any value.

Note:  You cannot change this attribute while the device is generating a waveform. If you want to change the device configuration, call the niFgen_AbortGeneration function or wait for the generation to complete.

Defined Values

NIFGEN_VAL_DIVIDE_DOWN	Divide down sampling—Sample rates are generated by dividing the source frequency.
NIFGEN_VAL_HIGH_RESOLUTION	High resolution sampling—Sample rate is generated by a high–resolution clock source.
NIFGEN_VAL_AUTOMATIC	Automatic Selection—NI-FGEN selects between the divide–down and high–resolution clocking modes.

Default Value: Depends on the device

Numeric Value	Data type	Access	Applies to	Coercion	High Level Functions
1150112	ViString	R/W	N/A	None	None

Specifies the Sample clock source.

Note:  The signal generator must not be in the Generating state when you change this attribute. To change the device configuration, call the niFgen_AbortGeneration function or wait for the generation to complete.

The following defined values are examples of possible Sample clock sources. For a complete list of the Sample clock sources available on your device, refer to the Routes topic for your device or the Device Routes tab in MAX.

Defined Values

OnboardClock	Specifies that the onboard clock is used as the Sample clock source.
ClkIn	Specifies that the signal at the CLK IN front panel connector is used as the Sample clock source.
PXI_Star	Specifies that the PXI star trigger line is used as the Sample clock source.
PXI_Trig0	Specifies that the PXI or RTSI line 0 is used as the Sample clock source.
PXI_Trig1	Specifies that the PXI or RTSI line 1 is used as the Sample clock source.
PXI_Trig2	Specifies that the PXI or RTSI line 2 is used as the Sample clock source.
PXI_Trig3	Specifies that the PXI or RTSI line 3 is used as the Sample clock source.
PXI_Trig4	Specifies that the PXI or RTSI line 4 is used as the Sample clock source.
PXI_Trig5	Specifies that the PXI or RTSI line 5 is used as the Sample clock source.
PXI_Trig6	Specifies that the PXI or RTSI line 6 is used as the Sample clock source.
PXI_Trig7	Specifies that the PXI or RTSI line 7 is used as the Sample clock source.
DDC_ClkIn	Specifies that the Sample clock from DDC connector is used as the Sample clock source.

Default Value: OnboardClock

Note : These defined values are currently not supported for gRPC, instead pass the raw values directly.

Numeric Value	Data type	Access	Applies to	Coercion	High Level Functions
1150320	ViString	R/W	N/A	None	niFgen_ExportSignal

Specifies the terminal to export the Sample clock. If you specify a divisor with the NIFGEN_ATTRIBUTE_EXPORTED_SAMPLE_CLOCK_DIVISOR attribute, the Sample clock exported with the NIFGEN_ATTRIBUTE_EXPORTED_SAMPLE_CLOCK_OUTPUT_TERMINAL attribute is the value of the Sample clock after it is divided-down. For a list of the terminals available on your device, refer to the Routes topic for your device or the Device Routes tab in MAX.

Note:  The signal generator must not be in the Generating state when you change this attribute. To change the device configuration, call the niFgen_AbortGeneration function or wait for the generation to complete.

Numeric Value	Data Type	Access	Applies to	Coercion	High-Level Functions
1150219	ViInt32	R/W	N/A	None	None

Specifies the factor by which to divide the Sample clock, also known as the Update clock, before it is exported. To export the Sample clock, use the niFgen_ExportSignal function or the NIFGEN_ATTRIBUTE_EXPORTED_SAMPLE_CLOCK_OUTPUT_TERMINAL attribute.

Valid Values: Range is from 1 to 4,096

Default Value: 1

Note:  You cannot change this property while the device is generating a waveform. If you want to change the device configuration, call the niFgen_AbortGeneration function or wait for the generation to complete.

Numeric Value	Data Type	Access	Applies to	Coercion	High-Level Functions
1150368	ViReal64	R/W	N/A	None	None

Specifies the Sample clock timebase rate. This attribute applies only to external Sample clock timebases.

Note:  The signal generator must not be in the Generating state when you set this attribute. To change the device configuration, call the niFgen_AbortGenerationfunction or wait for the generation to complete.

Numeric Value	Data Type	Access	Applies to	Coercion	High-Level Functions
1150367	ViString	R/W	N/A	None	None

Specifies the Sample clock timebase source.

Notes  The signal generator must not be in the Generating state when you change this attribute. To change the device configuration, call the niFgen_AbortGeneration function or wait for the generation to complete.

The following defined values are examples of possible Sample clock timebase sources. For a complete list of the Sample clock timebase sources available on your device, refer to the Routes topic for your device or the Device Routes tab in MAX.

Defined Values

OnboardClk (Default)	Specifies that the onboard Sample clock timebase is used as the source.
ClkIn	Specifies that the external signal on the CLK IN front panel connector is used as the source.

Note : These defined values are currently not supported for gRPC, instead pass the raw values directly.

Numeric Value	Data type	Access	Applies to	Coercion	High Level Functions
1150329	ViString	R/W	N/A	None	niFgen_ExportSignal

Specifies the terminal to export the Sample clock timebase.

For a list of the terminals available on your device, refer to the Routes topic for your device or the Device Routes tab in MAX.

If you specify a divisor with the NIFGEN_ATTRIBUTE_EXPORTED_SAMPLE_CLOCK_TIMEBASE_DIVISOR attribute, the Sample clock timebase exported with the NIFGEN_ATTRIBUTE_EXPORTED_SAMPLE_CLOCK_TIMEBASE_OUTPUT_TERMINAL attribute is the value of the Sample clock timebase after it is divided-down.

Note:  The signal generator must not be in the Generating state when you change this attribute. To change the device configuration, call the niFgen_AbortGeneration function or wait for the generation to complete.

Numeric Value	Data Type	Access	Applies to	Coercion	High-Level Functions
1150230	ViInt32	R/W	N/A	None	None

Specifies the factor by which to divide the device clock (Sample clock timebase) before it is exported. To export the Sample clock timebase, use the niFgen_ExportSignalfunction or the NIFGEN_ATTRIBUTE_EXPORTED_SAMPLE_CLOCK_TIMEBASE_OUTPUT_TERMINAL attribute.

Valid Values: 1 to 4,194,304

Note:  Not all devices support a divisor value of 1.

Numeric Value	Data Type	Access	Applies to	Coercion	High-Level Functions
1150376	ViReal64	R/W	N/A	None	None

Specifies a multiplication factor to use to obtain a desired sample rate from an external Sample clock. The resulting sample rate is equal to this factor multiplied by the external Sample clock rate. You can use this attribute to generate samples at a rate higher than your external clock rate. When using this attribute, you do not need to explicitly set the external clock rate.

Numeric Value	Data Type	Access	Applies to	Coercion	High-Level Functions
1150231	ViReal64	R/W	N/A	None	None

Specifies the delay in seconds to apply to an external Sample clock. This property is useful when trying to align the output of two devices.

Note:   For the NI 5421, absolute delay can only be applied when an external Sample clock is used.

Numeric Value	Data Type	Access	Applies to	Coercion	High-Level Functions
1150233	ViInt32	R/W	N/A	None	None

Specifies the external clock delay binary value.

Numeric Value	Data Type	Access	Applies to	Coercion	High-Level Functions
1150232	ViInt32	R/W	N/A	None	None

Specifies the oscillator phase DAC value.