Hardware Overview - nealcrook/multicomp6809 GitHub Wiki

Grant's original 6809 multicomp design combines an FPGA (mounted on a breakout board) with an external RAM chip and connectors. The modules of the design are:

  • A 6809 CPU
  • An 8Kbyte ROM, used as the boot ROM (running Microsoft BASIC)
  • Optionally, a 2Kbyte RAM
  • An SDcard controller
  • A UART (fixed baud rate)
  • A video terminal, interfacing through an external VGA connector and PS/2 keyboard connector. The software interface to this module makes it look exactly like a UART. It implements a sub-set of the VT-100/ANSI control codes and supports 8 colour text output with 2 levels of intensity.
  • Miscellaneous logic including address decoding, clock generation and an interface to an external static RAM.

Software for Grant's original design is limited to the ROM'd BASIC, which provides no mechanism for loading and saving programs. There is no software to make use of the SDcard controller.

My extended version has these modules:

  • A 6809 CPU (See CPU and clocking modifications)
  • An 8Kbyte ROM, used as the boot ROM (running CamelForth)
  • Optionally, a 2Kbyte RAM
  • An SDcard controller enhanced to support SDHC (See SD Controller modifications)
  • 2 UARTs (fixed baud rate)
  • A video terminal, interfacing through an external VGA connector and PS/2 keyboard connector. The software interface to this module makes it look exactly like a UART. It implements a sub-set of the VT-100/ANSI control codes and supports 8 colour text output with 2 levels of intensity. Various bugs have been fixed (See VDU modifications)
  • A GPIO unit
  • A simple MMU or memory-mapping unit, which includes the ability to write-protect RAM in 8Kbyte blocks and to disable the boot ROM under software control (See [[mk2 memory mapping unit)
  • 50Hz timer which can be used to generate a periodic interrupt
  • Hardware SingleStep mechanism linked to the CPU non-maskable interrupt
  • Miscellaneous logic including address decoding, clock generation and an interface to an external static RAM.

There are 2 configurations for this design:

  • The minimal configuration contains 2Kbyte of user RAM within the FPGA. It can function with or without external RAM. This is a good starting-point and it can also act as a useful environment for debugging problems with the external RAM. The restriction of this configuration is that the video terminal only provides a 40-column display (the FPGA does not have enough on-board RAM resources to support both the 2Kbyte user RAM and the memory required for the 80-column VDU).
  • The full configuration has no user RAM within the FPGA, but the video terminal provides an 80-column display.

CamelForth acts both as a debug monitor, as a programming environment in its own right, and as a mechanism for loading other software. CamelForth can access all of the hardware capabilities of the machine, and includes code to read and write an SDcard.

The minimal configuration can run CamelForth and can load, from SDcard, Microsoft BASIC. The full configuration can run all of the software that I have ported.