Introduction - muneeb-mbytes/verilator GitHub Wiki
VERILATOR
Verilator is a free,high performance and open-source software tool which converts a Hardware description language to a cycle-accurate behavioral model in C++ or System C that after compiling can be executed.
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Verilator is not a traditional simulator but is like a compiler which compiles the code.
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It can handle all versions of Verilog and also some SystemVerilog and achieves that speed by generating highly optimized C++ code from a given hardware design and is closer to synthesis than event-driven simulation.
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Verilog was the new Synthesis Language and C++ or System verilog is the Test-bench Language
History Of Verilator
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Verilator was born in 1994 by by Paul Wasson
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In 2001, Wilson Snyder took the kit, added a SystemC mode, and called it Verilator2. This was the first packaged public release.
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In 2002, Wilson Snyder created Verilator 3.000 by rewriting Verilator from scratch in C++. This added many optimizations, yielding about a 2-5x performance gain.
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In 2009, major SystemVerilog and DPI language support was added.
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In 2018, Verilator 4.000 was released with multithreaded support.
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In 2019, Verilator joined the CHIPS Alliance.
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In 2022, Verilator 5.000 was released with IEEE scheduling semantics, fork/join, delay handling, DFG performance optimizations, and other improvements.
Why Verilator?
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Outperforms many commercial simulators as Verilator promotes Faster RTL Development and verilog is a standard language where the waveform looks the same across RTL or SystemC.
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Supports automatically partitioning designs into single and multi threaded output models improving the performance.
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Community driven, Professionally supported and Openly Licensed that is its guided by the CHIPS Alliance and Linux Foundations.
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Also one of the key tools in the ASIC and FPGA ecosystem, which Antmicro is actively using and developing.
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Widely used by industries and academic deployment like Arm and RISC-V vendor IP
Note:
Single threaded processes contain the execution of instructions in a single sequence. In other words, one command is processes at a time.
Multi threaded processes allow the execution of multiple parts of a program at the same time.
How a Verilator works?
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The verilator executable is invoked with parameters similar to GCC (GNU Compiler collection is a compiler supporting various programming languages) or other simulators such as Cadence Verilog-XL/NC-Verilog, or Synopsys VCS.
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So the Verilator reads the specified SystemVerilog or RTL code, lints it (statically analysing the designs for issues or errors),optionally adds coverage and waveform tracing support, and compiles the design into a source-level multi threaded C++ or SystemC model.
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Then the resulting model’s code is output as .cpp and .hfiles.
Note: This is referred to as “Verilating”, and the process is “to Verilate” where as the output is a “Verilated” model.
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For simulation, a small-user written C++ wrapper file is required, the“wrapper”. This wrapper defines the C++ main function and instantiates the Verilated model as a C++/SystemC object.
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The C++ wrapper thus creates a runtime library provided by Verilator and are compiled to create a simulation executable performing the actual simulation during simulation runtime.
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The executable may also generate waveform traces of the design that may be viewed. It may also create coverage analysis data for post-analysis.
Verilator example with detailed steps
Let us consider a simple example and run it using Verilator. Steps are as follows:
Step 1
SV design code and testbench code is written in Verilator
Simple addition is taken as an example\
Step 2
To run the above testbench follow the two below commands
Command 1:
--binary: telling Verilator to do everything needed to create a simulation executable. It creates a new directory called obj_dir which contains executable file.
Command 2
Upon running the executable file using the above command we get the display statement containing message “hello”.
Step 3
To open gtkwave follow the below commands
Install gtkwave using sudo apt-get install gtkwave
Step 4
Waveform window opens which looks as shown below: