PowerPC Architecture. - muneeb-mbytes/computerArchitectureCourse GitHub Wiki
- PowerPC (Performance Optimization With Enhanced RISC- Performance Computing) is a RISC architecture created by (AIM) Apple–IBM–Motorola alliance in 1991
- The original idea for the PowerPC architecture came from IBM’s Power architecture (introduced in the Risc/6000) and retains a high level of compatibility with it
- The intention was to build a high-performance, superscalar low-cost processor
The POWER architecture incorporated lots of the RISC characteristics :
- fixed-length instructions
Some Computer CPUs use a fixed length instruction encoding format
That means:
Every computer instruction is represented using the same number of bytes
Example: ARM instructions are always 4 bytes long
- register-to-register architecture
Also known as a load-store architecture, it only allows operations between data in registers. This means that data must be loaded from memory into registers, operated on, and then stored back in memory.
- simple addressing modes
- large general register file
The POWER architecture includes a large general register file, enabling a rich set of registers for storing operands and intermediate results, thus enhancing performance and flexibility.
- three-operand instruction format
it uses three-operand instruction format, where an operation involves three operands: two source operands and one destination operand.