Comparing MIPS and PowerPC

• A dynamically scheduled pipeline goes past stalls to find later instructions to be executed while waiting for the stall to be resolved. Therefore, the Power PC is more efficient in handling instruction hazards that would cause a stall in the pipeline.
• Also the Power PC assembly language contains more jump instruction capabilities.
• Even though both MIPS and Power PC are able to support 32-bit registers, the PowerPC is also capable of supporting 64-bit registers as well.
• Both support FLOPS or floating point operations, but the Power PC is able to support these operations faster.
• They both have the basic instruction sets, but the Power PC is able to do more.

Basic Similarities

• They both use a pipelined architecture in their data path.
• MIPS and Power PC both use a stack frame to store variables that are passed by various functions in memory starting in high memory and growing toward low memory.
• They both support floating point operations.
• They both are capable of supporting 32-bit register size.
• Both the Power PC and MIPS use a branch prediction unit to determine if a branch should be taken.

Instructions in MIPS and PowerPC

Consider a sequence of instructions in MIPS on the left side and on the right side corresponding instruction in PowerPC.

1. Example of adding the contents of 2 registers :

For instance, in MIPS, we frequently need to compute address by adding two registers before using it in lw. Because the lw instruction lacks a mode that allows for the addition of two registers, we are usually wasting this constant field as we never utilize it. However, in the index mode, the instruction itself can add both an index and a base.

2. Consider an example of Update :

In MIPS, We are accessing memory with s3, offset is 4, that the result is brought to t0 and updating s3 by 4 for the subsequent iteration. But in PowerPC, we are using lwu (lw with update). so s3 is being used with offset 4, updating four more.