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Intel x86 Architecture - muneeb-mbytes/computerArchitectureCourse GitHub Wiki

History of intelx86 architecture

  • The x86 architecture was born out of Intel's 8086 processor, which was introduced in 1978.

  • Generally, X86 is the term for Intel processors that comprises of 286, 386, 486, and 586 processors. In modern times, the term "x86" is used to denote to any 32-bit processor that ensures backward compatibility for x86 instruction set architectures.

  • The 8086 was originated with a 16-bit microprocessor which denotes the microprocessor family on the basis of the Intel 8088 microprocessors and became an industry standard.

  • In 1982, 80286 was introduced which increased the address space to 24 bits as with 16 bits the addressability was only 64 kilobytes whereas 24 bits had 16 megabytes with some instructions.

  • With 80386 this series has got 32-bit architecture and more newer addressing modes were defined and also paging in terms of virtual memory was introduced.

  • Then there was 80486 Pentium, Pentium pro, Pentium 2, 3, 4 with compatibility and more instructions were added for higher performance.

  • Thus the x86 architecture has driven advances in processor technology, such as pipelining, superscalar execution, and 64-bit extensions, which have significantly increased performance and efficiency.

Features of Intel x86:

  • Support for both 32-bit and 64-bit processing.

  • Complex Instruction Set Computing (CISC) design that can perform multiple low-level operations within a single instruction and also have a lot of instructions say upto 350.

  • Variable-length instructions that is x86 instructions can vary in length and size from 1 to 17, which provides flexibility but can also lead to challenges in instruction decoding.

  • Intel x86 used a segmented memory model, where memory addresses were formed by combining a segment register and an offset.

  • Multiple operating modes, including real mode, protected mode, and long mode

  • Backward compatibility with earlier x86 processors that is allowing modern processors to run software designed for earlier x86-based systems.

  • The architecture includes a set of general-purpose registers, floating-point registers, and other specialized registers for tasks such as addressing and control.

  • Instruction Pipelining: Modern x86 processors use instruction pipelining to improve performance by allowing multiple instructions to be processed simultaneously.

  • Support for various instruction set extensions, such as MMX, SSE, and AVX to support multimedia and parallel processing.

Intel x86 Registers:

segmentation register drawing

The segment registers are 16-bit registers used to fully access the memory.

Segment memory model:

The aim of the segmented memory model is to divide the address space into separate smaller address spaces. Each address space can be specialized to store a specific type of information such as code or data.

Need for segmented memory:

There are two reasons for using segmentation.

The first is historical. In the early days different parts of a program were physically saved at different locations. The code was saved on punch cards, and the memory data was stored in DRAM memories. Hence, it was necessary to partition the address space among the devices that stored all the information that a program required.

This reason is not valid anymore. Nowadays, all the information a program requires is typically stored at the same place. However, we still need segmentation for security purposes. Hackers and viruses typically try to change the code of a program and insert their own code. Thus a normal program can exhibit malicious behavior and can corrupt data, or transfer sensitive data to third parties. To ensure added protection, the code region is saved in a code segment. Most systems do not allow normal store instructions to modify the code segment.

Purpose of segment registers:

The 6 segment registers store the most significant 16 bits of the starting location of the segment. The remaining bits were assumed to be all zeros.

  • The CS register stores the upper 16 bits of the starting location of the code segment.

  • Similarly, the DS register stores the upper 16 bits of the starting location for the data segment

  • The SS register stored the corresponding set of bits for the stack segment.

  • The ES (extra segment), FS, and GS registers could be used to store information for additional user defined segments.

Therefore, segmentation was a technique which is brought into earlier versions of this architecture to address larger memory than what can be done with a 16-bit address register.

So 16-bit register is limited to 64 k bytes but how do you access larger memory is with the help of a segment register.

In a segment register you set up a base and starting from that base you can access 64 register sorry 64 k bytes of memory. You want to address another area you can move your base and then address 64 k bytes there.