Fetch: Retrieve the instruction from memory using the program counter (PC) as the address.

Decode: Interpret the instruction to determine the operation to be performed (e.g., add, subtract, AND, OR, slt) and the operands involved.

Read: Access the register file to retrieve the values of the registers specified by the instruction's fields.

Execute: Perform the operation specified by the instruction using the operands obtained from the register file. This is typically done by passing the operands to the ALU (Arithmetic Logic Unit).

Write: Store the result of the operation back into the register file, if applicable.

Update: Increment the program counter (PC) to prepare for fetching the next instruction.

Ex: add $t0,$s1,$s2

To understand the instructions, please check this page

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Fetching instruction

Program Counter (PC): This is a special register that keeps track of the memory address of the next instruction to be fetched and executed. After each instruction is fetched, the PC is typically incremented to point to the next sequential instruction.

Instruction Memory: This is where the program's instructions are stored. It's assumed to have fixed contents, meaning the instructions cannot be modified during normal operation. This type of memory is often referred to as read-only memory (ROM). The instruction memory is accessed by providing it with an address (typically from the PC), and it outputs the instruction stored at that address.

The instruction memory behaves like a combinational circuit, meaning it produces an output based solely on its inputs (the address) without the need for a clock signal. This is because the fetching of instructions doesn't involve any internal state changes or sequential logic; it's a direct mapping from addresses to instructions.

Addressing Register File

Register File: This is an array of registers where data is stored. It allows reading two registers simultaneously and writing to one register at a time. It has three address inputs: read address 1, read address 2, and write address, each consisting of 5 bits. It also has two data outputs: read data 1 and read data 2 and there is one data input write data.

Instruction Decoding: The instructions are 32 bits long. Specific fields within these instructions are used to determine the addresses for reading and writing to the register file. The source register (rs) is determined by bits 21 to 25, and the register rt is determined by bits 16 to 20.

ALU (Arithmetic Logic Unit): This component performs arithmetic and logical operations on the data fetched from the register file. The ALU takes input from the register file and performs operations such as addition, subtraction, AND, OR, and comparison operations like equality and less than.

Control Signals: To specify the operation to be performed by the ALU, control signals are used. These signals dictate whether the ALU should perform addition, subtraction, logical operations, or comparison operations.

Data Flow: Once the addresses are provided and the register file responds with the data, the operands are passed to the ALU. The ALU then performs the specified operation, and the result can be stored back in the register file or used elsewhere in the processor, depending on the instruction being executed.