Datapath and Control - muneeb-mbytes/computerArchitectureCourse GitHub Wiki
Control signals
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Control signals for first multiplexer is Rdsd or Register File Destination. It will select the destination address in the register file which comes from ins[20:16] or ins[25:21].
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Then register file needs a control signal (RW)to tell it whether it has to write or not. Since not all of the instructions write into register file but only first five instructions write and load instruction; these six instructions out of the nine write into the register file hence it has to be made 0 or 1 accordingly. *ALU source (A source) is the control signal for next multiplexer and it will distinguish whether ALU is being used for address calculation or for normal arithmetic logical operations.
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ALU requires 3 bits to control it. The third bit is 'op' control signal which is for operation.
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Status output from ALU which is labeled as 'z' standing for 0, is a comparison of the two operands from the point of view beq instruction. Comparison was done by doing subtraction and checking of the result is 0 . This is status and others are control.
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Data memory (DM) requires control for read or write.MR stands for memory read, MW stands for memory write. Memory does only one operation at a time, either read or write.
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Next multiplexer here distinguishes between what goes to register file whether it is from memory or from ALU so memory to register file M2R.
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Other signals and 'P source' or PC source and 'jump' instruction.
Datapath and control
- The control signals require some circuit which will produce the inputs and outputs.
- The job of controller is based on instruction we are executing to produce the appropriate control signals.