Providing delay using counter - muneeb-mbytes/FPGABoard_edgeSpartan6 GitHub Wiki
Find the number of bits required for a counter with a delay of 10ms of a push button using a 50MHz clock, we can use the following formula:
N = log2(Tdelay/Tclk)
Where:-
- N is the number of bits required for the counter
- Tclk is the clock period (in seconds)
- Tdelay is the delay of the push button (in seconds)
- First, we need to convert the clock frequency from 50MHz to the clock period Tclk:
- Tclk = 1/fclk
- Tclk = 1/50MHz
- Tclk = 20ns
Next, we need to convert the delay of the push button to seconds:
- Tdelay = 10ms
- Tdelay = 0.01s Now we can substitute these values into the formula to find the number of bits required:
- N = log2(Tdelay/Tclk)
- N = log2(10ms/20ns)
- N = log2(500000)
- N = 18.87
- Since we cannot have a fraction of a bit in a counter, we need to round up to the nearest integer. Therefore, the number of bits required for the counter would be 19 bits.
If we have a push button delay of 20ms and a clock frequency of 50MHz :
-
N = log2(Tdelay/Tclk)
-
where:
-
N is the number of bits required for the counter
-
Tdelay is the delay of the push button (in seconds)
-
Tclk is the clock period (in seconds)
-
First, we need to calculate Tclk:
-
Tclk = 1/fclk = 1/50MHz = 20ns
-
Next, we can calculate the number of bits required:
-
N = log2(Tdelay/Tclk)
-
N = log2(20ms/20ns)
-
N = log2(1000000)
-
N = 19.93
-
Since we cannot have a fraction of a bit in a counter, we need to round up to the nearest integer. Therefore, the number of bits required for the counter would be 20 bit
-
So for a push button delay of 20ms with a clock frequency of 50MHz, a counter with at least 20 bits is required to accurately count the delay.