Integrated software analyzer - muneeb-mbytes/FPGABoard_edgeSpartan6 GitHub Wiki
Debugging Hardware in Xilinx ISE
ChipScope
ChipScope is a powerful debugging tool available in Xilinx ISE that provides a way to probe and analyze signals inside an FPGA. It enables you to capture and analyze signals in real-time, and visualize the captured data in various formats such as waveform, data, and statistical views.
ChipScope uses hardware embedded in the FPGA to capture and analyze signals, which provides much higher performance and accuracy than software-based debugging techniques. ChipScope can capture and display data from various sources such as internal signals, FPGA pins, and external interfaces.
ChipScope consists of two major components:
- ChipScope Core: The ChipScope Core is a module that is embedded into your design during synthesis. The ChipScope Core contains logic that captures signals and stores them in a buffer for analysis. The size of the buffer can be configured to match the size of the signals you want to capture.
- ChipScope Pro: The ChipScope Pro software is a user interface that connects to the ChipScope Core in your design. It allows you to set up trigger conditions, capture signals, and analyze the captured data. The captured data can be displayed in various formats such as waveform, data, and statistical views.
Note: It is a logic analyser. We get digital output not continuous waveform, We get discrete samples, that is one sample per clock, samples are connected together to form a waveform.
Steps For Using ChipScope Pro in Xilinx ISE
- Firstly write and Synthesise any desired program using verilog HDL. For example we take a simple program for D flip flop.
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Then we implement the design and run it on an FPGA for verifying the output after generating the programming file and configuring it. Once the result is verified we move for implementing it using the ILA tool (Chipscope Pro).
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For verifying using the ILA tool we first have to add an extra file called CDC file with an extension “example.cdc” , Where CDC stands for Chipscope Definition and Connection file
- After adding the CDC file to the project , now open the file by clicking on it, which will be present below the verilog file in the project . This will open the Chipscope Pro core inserter. Now select the required location and ICON under the DEVICE section to create a ILA core, select the user and click on Next.
- Now we have three main Parameters for our ILA core i.e Trigger Parameters, Capture Parameters and Net Connections as shown below .
- Trigger Parameters
Here we have to set the parameters based on the triggering of the input. The trigger width represents the number of channels required for each bit of inputs and outputs. For example for D Flip flop we have 2 Inputs except clock and one output Q , so we select the trigger width as 3 .
We have the option of choosing the number of input trigger ports, by which we can select multiple trigger ports also. For example in our case we can select 2 trigger ports , one for the Output Q and one for both the Inputs .i.e D and Reset.
We also have the Choosing Match unit Type, There are 6 types of Match type we can choose based on the triggering we require in our project shown below.
Basic type: This type is used to compare data signals where transition detection is not important.
Basic w/edges: This type is used to compare control signals where transition detection is important.
Extended: This type is used to compare data signals where magnitude is important.
Extended w/edges: This type is used to compare data signals where magnitude and transition detection is important.
Range: This type is used to compare data signals where a specific range of values are taken.
Range w/edges: This type is used to compare data signals where transition detection and specific range of values are considered.
- Capture Parameters
Here we have to set the sampling depth for our input signals ie 1024, 2048….etc And we can set the clock edge i.e rising edge or falling edge . Then tick mark the trigger port which we have already created and click on Next.
- Net Connections
In the Net Connection part we have 2 Ports to be set
1.Clock Port 2.Trigger or Data Port
Initially they will be Red in color which indicates that all the ports are not set. If all the ports are correctly assigned then it turns to Black
In the clock port section we assign the Clock variable to the global clock of the analyzer as shown above. To assign it we have to find the clock variable in the Net name list and click on the required channel for example CH ;0 and click make connection to assign the port. We can also remove any assignment by Remove Connection.
Similarly we also assign out Inputs and Outputs to a particular channel in the Trigger Port section as shown below. In D flip flop we considered input as D and reset and output is Q
'Trigger Point 0 (TP0)'
'Trigger Point 1 (TP1)'
Once done with assigning the Clock port and Trigger Ports, Click on Return to Project Navigator and Save it.
After returning to Project navigator click on Analyse design using chipscope
After Clicking on the Analyse design using ChipScope, it will take some time to translate, Map, Place and Route, After which automatically a new window will open i.e the ChipScope Pro Analyzer. Now in that window there is an option to Open cable/ Search JTAG Chain in the top left corner as shown below.
After clicking on the above option, it will now try to connect to the FPGA device available. And it will show the available device just below the New Project section in the left side bar.
If there is no device connected or the cable is not connected then there will be an error message displayed on the white screen below.
After connecting the JTAG chian, now right click on the device and click on configure option
We need to add the location of the file in JTAG configuration and press ok. Then the waveform tab will be opening and we can cross verify the output.
Then lets set input D as 0 and then press the play button so that we get the waveform then for 2nd condition set D=1 then press Trigger option hence output will be displayed, similarly if we can change the input and press trigger option to get waveform and play button is only for the starting step,
Play Button is marked with black colour abd Trigger (T!) is marked with orange colour
Case 1: when reset is 0, D is 0 output will be Q=0
Case 2: when reset is 0, D=1 and output will be Q=1
Case 3: when reset is 1, D=1 and output will be reseted to 0
Hence all the waveforms are obtained as per needed