Getting Started with Xilinx ISE - muneeb-mbytes/FPGABoard_edgeSpartan6 GitHub Wiki

After successful installation of Xilinx ISE open your terminal and source the settings64.sh file

source /opt/Xilinx/14.7/ISE_DS/settings64.sh

This command is followed by ise

The above steps are for Linux users. Windows users can simply double click on the ISE icon.

Now Project navigator will open. This is how it looks.

Next step is to close any projects that are open. To close Project in the toolbar go to File>Close Project.

Let us now start by Creating a new Project! Go to File>New Project. A new window will open fill in the name of the project and select the desired location. Under top level source type select HDL. Next project settings will open up, select the following settings for it.

• Evaluation Development Board - None Specified
• Product Category- All
• Family- Spartan 6
• Device- XC6SLX9
• Package- TQG144
• Synthesis Tool- XST (Verilog/VHDL)
• Simulator- iSim (VHDL/Verilog)
• Preferred Language- Verilog

Next step is to add the source file. Go to Project>Add source> select the desired file. You can also create your own source file by creating one.

Next Step is Synthesize. Double click on Synthesize XST.

Next step is to check the RTL schematic. Double Click on View RTL Schematic.

This will show the RTL schematic. The RTL schematic is as follows.

Next step is to check the Technology schematic. Double Click on View Technology Schematic.

This will show the Technology Schematic. It looks as follows.

Double Clicking on the LUT in the Schematic will give details such as the Schematic, Equation, Truth table and K-Map of the Look Up Table(LUT).

Next step is Check Syntax. Double Click on Check Syntax.

After Check syntax is Successful double click on Generate Post-Synthesis Simulation Model.

Adding a Stimulus Block Go to Project>Add Source> Select the testbench file.

Select the View to Simulation.

Double Click on Behavioral Check Syntax.

After Behavioral Check Syntax is completed successfully. Double Click on Simulate Behavioral Model.

This will open up a new window called I-Simulator.

Verify the logic using the waveform.

Now remove the TestBench file by right clicking on it and then Remove.

Now add the UCF file. ** Project>Add source> select the ucf file.**

Double click on Implement design.

Once Implement Design is done Double click on Generate programming file.

Next step is to configure the device. Expand Configure Target Device and double click on Manage Configuration Project (iMPACT).

This will open up a new window called iMPACT

Double click on Boundary scan.

Right click and select Initialize Chain . This can be done using Ctrl+I as well.

Now select the bitstream file. This will have an extension .bit and will be in the project directory.

Now a new window will pop up asking "Do you want to attach an SPI or BPI PROM to this device?" Click on No here.

Now a new pop up will open named Device Programming Properties. Click on Ok.

Once the previous step is done Right click and select Program.

You should now receive a "Program Succeeded" message as below.