Flash Chip, Serial Interface and PS 2 Keyboard - muneeb-mbytes/FPGABoard_edgeSpartan6 GitHub Wiki

Flash Chip

flash drawio

Consists of four pins:

1. NET FLASH_CS LOC = "p38"

  • Assigns the FLASH_CS signal to pin "p38" on the FPGA device.

  • This pin is likely used for chip select, which is a signal that enables or disables the flash memory chip for data transfer.

2. NET FLASH_SCK LOC = "p70"

  • Assigns the FLASH_SCK signal to pin "p70" on the FPGA device.

  • This pin is likely used for clock input to the flash memory chip, and is used to synchronize data transfer between the FPGA and the flash memory.

3. NET FLASH_MOSI LOC = "p64"

  • Assigns the FLASH_MOSI signal to pin "p64" on the FPGA device.

  • This pin is likely used for data output from the FPGA to the flash memory chip.

  • MOSI - Master Out Slave In

4. NET FLASH_MISO LOC = "p35"

  • Assigns the FLASH_MISO signal to pin "p35" on the FPGA device. This pin is likely used for data input from the flash memory chip to the FPGA.

  • MISO - Master In Slave Out

Serial Interface

si drawio

Consists of 2 pins:

1. NET "TXD" LOC = "P117";

  • Transmit data (output to FTDI that is Future Technology Device International which is a USB to serial converter allowing simple connection to USB) states that there is a net called "TXD" which is located at pin "P117" on the device.

  • This net is used to transmit data from the device to another device over the serial interface.

  • In this case, the data is output to an FTDI chip, which is a type of integrated circuit that provides a USB-to-serial interface.

2. NET "RXD" LOC = "P116";

  • Receive data (input from FTDI chip) says that there is another net called "RXD" which is located at pin "P116" on the device.

  • This net is used to receive data from another device over the serial interface.

  • In this case, the data is input from the FTDI chip.

PS/2 Keyboard

ps2 drawio

PS/2 stands for Personal System/2 which is a standard for connecting input devices such as keyboards and mice to a computer.

Consists of 2 Pins:

1. NET "KBD_CLK" LOC = "p80" | PULLUP;

  • KBD_CLK : Keyboard Clock

  • Assigns the location and the pull-up resistor to the clock signal (KBD_CLK) of the PS/2 keyboard on the FPGA board.

  • The clock signal is connected to pin p80 and is used to synchronize the data transmission between the keyboard and the FPGA board.

  • The pull-up resistor is used to ensure that the clock signal remains at a high level when the keyboard is not sending any data.

2. NET "KBD_DAT"LOC = "p81" | PULLUP;

  • KBD_DAT : Keyboard Data

  • Assigns the location and the pull-up resistor to the data signal (KBD_DAT) of the PS/2 keyboard on the FPGA board.

  • The data signal is connected to pin p81 and is used to transmit the keystrokes from the keyboard to the FPGA board.

  • The pull-up resistor is used to ensure that the data signal remains at a high level when the keyboard is not sending any data.