meM57110 - micro-FPGA/meM GitHub Wiki
This was the first micro embedded Matrix ever designed - meM57110 was made loosely compatible with SLG46110. Testing was done with NVM bitstreams generated with GreenPAK designer.
Proof of Concept (Revision 0.1)
After initial testing on S7-mini from BML (Xilinx Spartan-7 S25) standalone demo was implemented on XO2000 board with Lattice XO2-4000 FPGA. Bitstream loading over UART, simple ASCII protocol (R = reset, 0/1 send bit, S - Start).
Features implemented
- 1:1 bitstream compatible (512 bits) with SLG46110
- Matrix multiplexer
- Clock dividers/multiplexer
- all LUT and F/F (no latch function)
- counters: CNT0, CNT1, CNT3
- all I/O connected to PMOD pins
- user LED's connected to I/O output drivers
- user button connected to "PIN2" input
This configuration uses 640 (30%) of slices from the XO2-4000